In computer science , a tagged architecture is a type of computer architecture where every word of memory constitutes a tagged union , being divided into a number of bits of data, and a tag section that describes the type of the data: how it is to be interpreted, and, if it is a reference, the type of the object that it points to.
7-666: The Rice Institute Computer , also known as the Rice Computer or R1, was a 54-bit tagged architecture digital computer built during 1958–1961 (partially operational beginning in 1959) on the campus of Rice University , Houston , Texas , United States. Operating as Rice's primary computer until the middle 1960s, the Rice Institute Computer was decommissioned in 1971. The system initially used vacuum tubes and semiconductor diodes for its logic circuits; some later peripherals were built in solid-state emitter-coupled logic . It
14-524: The least-significant bit of each 16-bit word as a tag bit: if it was clear then the hardware would accept it as an aligned memory address while if it was set it was treated as a ( shifted ) 15-bit integer. Current Intel documentation mentions that the lower bits of a memory address might be similarly used by some interpreter -based systems. In the Soviet Union, the Elbrus series of supercomputers pioneered
21-607: The characteristics now consider to be part of tagged architectures. The RCA 601 has a 3-bit tag register and a 3-bit tag for every 24-bit half-word. Every instruction can request a test for equal or unequal tag, and cause a maskable interrupt if the specified match fails. There is no architectural connection between the tag and the contents of the half-word; it is strictly determined by the software. The Burroughs B5000 , B5500 and B5700 have 48-bit words with no appended tag field. However, while there are no tag fields for character, instruction or numeric (floating point) words, all of
28-530: The control word formats include a 3-bit tag. However, the replacement architecture, starting with the B6500, does have a tag for every word. In contrast, program and data memory are indistinguishable in the von Neumann architecture , making the way the memory is referenced critical to interpret the correct meaning. Notable examples of American tagged architectures were the Lisp machines , which had tagged pointer support at
35-554: The hardware and opcode level, the Burroughs B6500 and successors , which have a data-driven tagged and descriptor-based architecture, and the non-commercial Rice Computer . Both the Burroughs and Lisp machine are examples of high-level language computer architectures , where the tagging is used to support types from a high-level language at the hardware level. In addition to this, the original Xerox Smalltalk implementation used
42-558: The original electrostatic memory was soon decommissioned due to falling reliability in its old age. The R1 had seven memory-mapped general-purpose processor registers , each 54 bits in size, in addition to a constant zero register. For memory addressing, seven 16-bit "B-Registers" were used. The program counter was also held in a writable "B-Register". See the table below for conventions and hardware-enforced usage of these registers. Tagged architecture Some early systems use tagging of data in memory but do not have all of
49-543: Was designed by Martin H. Graham . A copy of the machine called OSAGE was built and operated at the University of Oklahoma . Memory was implemented using a variety of technologies over the lifetime of the R1. Originally a cathode ray tube or " Williams tube " array, RCA core memory was introduced in 1966, followed by Ampex core memory in 1967. Following those two upgrades , the R1 had reached its full 32k word capacity, although
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