Open Threat Exchange (OTX) is a crowd-sourced computer-security platform. It has more than 180,000 participants in 140 countries who share more than 19 million potential threats daily. It is free to use.
116-409: Founded in 2012, OTX was created and is run by AlienVault (now AT&T Cybersecurity), a developer of commercial and open source solutions to manage cyber attacks. The collaborative threat exchange was created partly as a counterweight to criminal hackers successfully working together and sharing information about viruses, malware and other cyber attacks. OTX is cloud-hosted. Information sharing covers
232-636: A 1024 GB flash chip, with eight stacked 96-layer V-NAND chips and with QLC technology. Flash memory stores information in an array of memory cells made from floating-gate transistors . In single-level cell (SLC) devices, each cell stores only one bit of information. Multi-level cell (MLC) devices, including triple-level cell (TLC) devices, can store more than one bit per cell. The floating gate may be conductive (typically polysilicon in most kinds of flash memory) or non-conductive (as in SONOS flash memory). In flash memory, each memory cell resembles
348-489: A 16 GB flash memory chip that was manufactured with 24 stacked NAND flash chips using a wafer bonding process. Toshiba also used an eight-layer 3D IC for their 32 GB THGBM flash chip in 2008. In 2010, Toshiba used a 16-layer 3D IC for their 128 GB THGBM2 flash chip, which was manufactured with 16 stacked 8 GB chips. In the 2010s, 3D ICs came into widespread commercial use for NAND flash memory in mobile devices . In 2016, Micron and Intel introduced
464-433: A 64 MB NOR flash memory chip. In 2009, Toshiba and SanDisk introduced NAND flash chips with QLC technology storing 4 bits per cell and holding a capacity of 64 Gbit. Samsung Electronics introduced triple-level cell (TLC) technology storing 3-bits per cell, and began mass-producing NAND chips with TLC technology in 2010. Charge trap flash (CTF) technology replaces the polysilicon floating gate, which
580-548: A certain number of faults (NOR flash, as is used for a BIOS ROM, is expected to be fault-free). Manufacturers try to maximize the amount of usable storage by shrinking the size of the transistors or cells, however the industry can avoid this and achieve higher storage densities per die by using 3D NAND, which stacks cells on top of each other. NAND flash cells are read by analysing their response to various voltages. NAND flash uses tunnel injection for writing and tunnel release for erasing. NAND flash memory forms
696-517: A charge-trapping mechanism for NOR flash memory cells. CTF was later commercialized by AMD and Fujitsu in 2002. 3D V-NAND (vertical NAND) technology stacks NAND flash memory cells vertically within a chip using 3D charge trap flash (CTP) technology. 3D V-NAND technology was first announced by Toshiba in 2007, and the first device, with 24 layers, was first commercialized by Samsung Electronics in 2013. 3D integrated circuit (3D IC) technology stacks integrated circuit (IC) chips vertically into
812-546: A dashboard with details about the top malicious IPs around the world and to check the status of specific IPs; notifications should an organization's IP or domain be found in a hacker forum, blacklist or be listed by in OTX; and a feature to review log files to determine if there has been communication with known malicious IPs. In 2016, AlienVault released a new version of OTX allowing participants to create private communities and discussions groups to share information on threats only within
928-437: A limited group of private investors (equivalent to $ 21 million in 2022), convertible at $ 5 per share. Just 2 years later, Intel became a public company via an initial public offering (IPO), raising $ 6.8 million ($ 23.50 per share). Intel was one of the very first companies to be listed on the then-newly established National Association of Securities Dealers Automated Quotations ( NASDAQ ) stock exchange. Intel's third employee
1044-563: A major retrenchment for most of the major semiconductor manufacturers, except for Qualcomm, which continued to see healthy purchases from its largest customer, Apple. As of July 2013, five companies were using Intel's fabs via the Intel Custom Foundry division: Achronix , Tabula , Netronome , Microsemi , and Panasonic – most are field-programmable gate array (FPGA) makers, but Netronome designs network processors. Only Achronix began shipping chips made by Intel using
1160-425: A more typical 10,000 or 100,000 erase cycles, up to 1,000,000 erase cycles. NOR-based flash was the basis of early flash-based removable media; CompactFlash was originally based on it, though later cards moved to less expensive NAND flash. NAND flash has reduced erase and write times, and requires less chip area per cell, thus allowing greater storage density and lower cost per bit than NOR flash. However,
1276-616: A new microprocessor manufacturing facility in Chandler, Arizona , completed in 2013 at a cost of $ 5 billion. The building is now the 10 nm-certified Fab 42 and is connected to the other Fabs (12, 22, 32) on Ocotillo Campus via an enclosed bridge known as the Link. The company produces three-quarters of its products in the United States, although three-quarters of its revenue come from overseas. The Alliance for Affordable Internet (A4AI)
SECTION 10
#17331057270061392-518: A planar charge trap cell into a cylindrical form. As of 2020, 3D NAND flash memories by Micron and Intel instead use floating gates, however, Micron 128 layer and above 3D NAND memories use a conventional charge trap structure, due to the dissolution of the partnership between Micron and Intel. Charge trap 3D NAND flash is thinner than floating gate 3D NAND. In floating gate 3D NAND, the memory cells are completely separated from one another, whereas in charge trap 3D NAND, vertical groups of memory cells share
1508-676: A processor for tablets and smartphones – to the market in 2012, as an effort to compete with Arm. As a 32-nanometer processor, Medfield is designed to be energy-efficient, which is one of the core features in Arm's chips. At the Intel Developers Forum (IDF) 2011 in San Francisco, Intel's partnership with Google was announced. In January 2012, Google announced Android 2.3, supporting Intel's Atom microprocessor. In 2013, Intel's Kirk Skaugen said that Intel's exclusive focus on Microsoft platforms
1624-561: A real-time threat feed. Users can share the IP addresses or websites from where attacks originated or look up specific threats to see if anyone has already left such information. Users can subscribe to a “Pulse,” an analysis of a specific threat, including data on IoC, impact, and the targeted software. Pulses can be exported as STIX, JSON, OpenloC, MAEC and CSV, and can be used to automatically update local security products. Users can up-vote and comment on specific pulses to assist others in identifying
1740-716: A reduction in Intel's dominance and market share in the PC market. Nevertheless, with a 68.4% market share as of 2023, Intel still leads the x86 market by a wide margin. In addition, Intel's ability to design and manufacture its own chips is considered a rarity in the semiconductor industry , as most chip designers do not have their own production facilities and instead rely on contract manufacturers (e.g. AMD and Nvidia ). In 2023, Dell accounted for about 19% of Intel's total revenues, Lenovo accounted for 11% of total revenues, and HP Inc. accounted for 10% of total revenues. As of May 2024,
1856-463: A separate flash memory controller chip. The NAND type is found mainly in memory cards , USB flash drives , solid-state drives (those produced since 2009), feature phones , smartphones , and similar products, for general storage and transfer of data. NAND or NOR flash memory is also often used to store configuration data in digital products, a task previously made possible by EEPROM or battery-powered static RAM . A key disadvantage of flash memory
1972-421: A separate die inside the package. The origins of flash memory can be traced back to the development of the floating-gate MOSFET (FGMOS) , also known as the floating-gate transistor. The original MOSFET was invented at Bell Labs between 1955 and 1960, after Frosch and Derick discovered surface passivation and used their discovery to create the first planar transistors. Dawon Kahng went on to develop
2088-485: A single 3D IC chip package. Toshiba introduced 3D IC technology to NAND flash memory in April 2007, when they debuted a 16 GB eMMC compliant (product number THGAM0G7D8DBAI6, often abbreviated THGAM on consumer websites) embedded NAND flash memory chip, which was manufactured with eight stacked 2 GB NAND flash chips. In September 2007, Hynix Semiconductor (now SK Hynix ) introduced 24-layer 3D IC technology, with
2204-424: A single memory product. A single-level NOR flash cell in its default state is logically equivalent to a binary "1" value, because current will flow through the channel under application of an appropriate voltage to the control gate, so that the bitline voltage is pulled down. A NOR flash cell can be programmed, or set to a binary "0" value, by the following procedure: To erase a NOR flash cell (resetting it to
2320-409: A single supply voltage and produce the high voltages that are required using on-chip charge pumps . Over half the energy used by a 1.8 V-NAND flash chip is lost in the charge pump itself. Since boost converters are inherently more efficient than charge pumps, researchers developing low-power SSDs have proposed returning to the dual Vcc/Vpp supply voltages used on all early flash chips, driving
2436-579: A standalone business unit. Unlike Intel Custom Foundry, IFS will offer a combination of packaging and process technology, and Intel's IP portfolio including x86 cores. Other plans for the company include a partnership with IBM and a new event for developers and engineers, called "Intel ON". Gelsinger also confirmed that Intel's 7 nm process is on track, and that the first products using their 7 nm process (also known as Intel 4) are Ponte Vecchio and Meteor Lake . In January 2022, Intel reportedly selected New Albany, Ohio , near Columbus, Ohio , as
SECTION 20
#17331057270062552-485: A standard metal–oxide–semiconductor field-effect transistor (MOSFET) except that the transistor has two gates instead of one. The cells can be seen as an electrical switch in which current flows between two terminals (source and drain) and is controlled by a floating gate (FG) and a control gate (CG). The CG is similar to the gate in other MOS transistors, but below this, there is the FG insulated all around by an oxide layer. The FG
2668-623: A stroke regained much of its leadership of the field. In 2008, Intel had another "tick" when it introduced the Penryn microarchitecture, fabricated using the 45 nm process node. Later that year, Intel released a processor with the Nehalem architecture to positive reception. On June 27, 2006, the sale of Intel's XScale assets was announced. Intel agreed to sell the XScale processor business to Marvell Technology Group for an estimated $ 600 million and
2784-472: A technology known as CMOS Under the Array/CMOS Under Array (CUA), Core over Periphery (COP), Periphery Under Cell (PUA), or Xtacking, in which the control circuitry for the flash memory is placed under or above the flash memory cell array. This has allowed for an increase in the number of planes or sections a flash memory chip has, increasing from 2 planes to 4, without increasing the area dedicated to
2900-838: A time. NAND flash also uses floating-gate transistors , but they are connected in a way that resembles a NAND gate : several transistors are connected in series, and the bit line is pulled low only if all the word lines are pulled high (above the transistors' V T ). These groups are then connected via some additional transistors to a NOR-style bit line array in the same way that single transistors are linked in NOR ;flash. Compared to NOR flash, replacing single transistors with serial-linked groups adds an extra level of addressing. Whereas NOR flash might address memory by page then word, NAND flash might address it by page, word and bit. Bit-level addressing suits bit-serial applications (such as hard disk emulation), which access only one bit at
3016-453: A time. Execute-in-place applications, on the other hand, require every bit in a word to be accessed simultaneously. This requires word-level addressing. In any case, both bit and word addressing modes are possible with either NOR or NAND flash. To read data, first the desired group is selected (in the same way that a single transistor is selected from a NOR array). Next, most of the word lines are pulled up above V T2 , while one of them
3132-506: A type of flash memory with a charge trap method. In 1998, Boaz Eitan of Saifun Semiconductors (later acquired by Spansion ) patented a flash memory technology named NROM that took advantage of a charge trapping layer to replace the conventional floating gate used in conventional flash memory designs. In 2000, an Advanced Micro Devices (AMD) research team led by Richard M. Fastow, Egyptian engineer Khaled Z. Ahmed and Jordanian engineer Sameer Haddad (who later joined Spansion) demonstrated
3248-447: A variation, the floating-gate MOSFET, with Taiwanese-American engineer Simon Min Sze at Bell Labs in 1967. They proposed that it could be used as floating-gate memory cells for storing a form of programmable read-only memory ( PROM ) that is both non-volatile and re-programmable. Early types of floating-gate memory included EPROM (erasable PROM) and EEPROM (electrically erasable PROM) in
3364-437: A wide range of issues related to security, including viruses, malware, intrusion detection and firewalls. Its automated tools cleanse, aggregate, validate and publish data shared by participants. The data is validated by the OTX platform then stripped of information identifying the participating contributor. In 2015, OTX 2.0 added a social network which enables members to share, discuss and research security threats, including via
3480-452: Is RISC-V , which is an open source CPU instruction set. The major Chinese phone and telecommunications manufacturer Huawei has released chips based on the RISC-V instruction set due to US sanctions against China . Intel has been involved in several disputes regarding the violation of antitrust laws , which are noted below. Intel reported total CO 2 e emissions (direct + indirect) for
3596-444: Is an electrically insulating tunnel oxide layer between the floating gate and the silicon, so the gate "floats" above the silicon. The oxide keeps the electrons confined to the floating gate. Degradation or wear (and the limited endurance of floating gate Flash memory) occurs due to the extremely high electric field (10 million volts per centimeter) experienced by the oxide. Such high voltage densities can break atomic bonds over time in
Open Threat Exchange - Misplaced Pages Continue
3712-456: Is associated with the executive leadership and vision of Andrew Grove . The company was a key component of the rise of Silicon Valley as a high-tech center, as well as being an early developer of SRAM and DRAM memory chips, which represented the majority of its business until 1981. Although Intel created the world's first commercial microprocessor chip—the Intel 4004 —in 1971, it was not until
3828-517: Is considered one of the world's largest semiconductor chip manufacturers by revenue and ranked in the Fortune 500 list of the largest United States corporations by revenue for nearly a decade, from 2007 to 2016 fiscal years, until it was removed from the ranking in 2018. In 2020, it was reinstated and ranked 45th, being the 7th-largest technology company in the ranking . Intel supplies microprocessors for most manufacturers of computer systems, and
3944-438: Is expected to affect Intel minimally; however, it might prompt other PC manufacturers to reevaluate their reliance on Intel and the x86 architecture. On March 23, 2021, CEO Pat Gelsinger laid out new plans for the company. These include a new strategy, called IDM 2.0, that includes investments in manufacturing facilities, use of both internal and external foundries, and a new foundry business called Intel Foundry Services (IFS),
4060-518: Is interposed between the CG and the MOSFET channel. Because the FG is electrically isolated by its insulating layer, electrons placed on it are trapped. When the FG is charged with electrons, this charge screens the electric field from the CG, thus, increasing the threshold voltage (V T ) of the cell. This means that the V T of the cell can be changed between the uncharged FG threshold voltage (V T1 ) and
4176-553: Is often employed in scenarios where cost-effective, high-capacity storage is crucial, such as in USB drives, memory cards, and solid-state drives ( SSDs ). The primary differentiator lies in their use cases and internal structures. NOR flash is optimal for applications requiring quick access to individual bytes, like in embedded systems for program execution. NAND flash, on the other hand, shines in scenarios demanding cost-effective, high-capacity storage with sequential data access. Flash memory
4292-484: Is one of the developers of the x86 series of instruction sets found in most personal computers (PCs). It also manufactures chipsets , network interface controllers , flash memory , graphics processing units (GPUs), field-programmable gate arrays (FPGAs), and other devices related to communications and computing. Intel has a strong presence in the high-performance general-purpose and gaming PC market with its Intel Core line of CPUs, whose high-end models are among
4408-466: Is planned for 2027. Including subcontractors, this would create 10,000 new jobs. In August 2022, Intel signed a $ 30 billion partnership with Brookfield Asset Management to fund its recent factory expansions. As part of the deal, Intel would have a controlling stake by funding 51% of the cost of building new chip-making facilities in Chandler, with Brookfield owning the remaining 49% stake, allowing
4524-569: Is programmed in blocks while EEPROM is programmed in bytes. According to Toshiba, the name "flash" was suggested by Masuoka's colleague, Shōji Ariizumi, because the erasure process of the memory contents reminded him of the flash of a camera . Masuoka and colleagues presented the invention of NOR flash in 1984, and then NAND flash at the IEEE 1987 International Electron Devices Meeting (IEDM) held in San Francisco. Toshiba commercially launched NAND flash memory in 1987. Intel Corporation introduced
4640-422: Is pulled up to V I . The series group will conduct (and pull the bit line low) if the selected bit has not been programmed. Despite the additional transistors, the reduction in ground wires and bit lines allows a denser layout and greater storage capacity per chip. (The ground wires and bit lines are actually much wider than the lines in the diagrams.) In addition, NAND flash is typically permitted to contain
4756-484: Is sandwiched between a blocking gate oxide above and a tunneling oxide below it, with an electrically insulating silicon nitride layer; the silicon nitride layer traps electrons. In theory, CTF is less prone to electron leakage, providing improved data retention. Because CTF replaces the polysilicon with an electrically insulating nitride, it allows for smaller cells and higher endurance (lower degradation or wear). However, electrons can become trapped and accumulate in
Open Threat Exchange - Misplaced Pages Continue
4872-510: Is that it can endure only a relatively small number of write cycles in a specific block. NOR flash is known for its direct random access capabilities, making it apt for executing code directly. Its architecture allows for individual byte access, facilitating faster read speeds compared to NAND flash. NAND flash memory operates with a different architecture, relying on a serial access approach. This makes NAND suitable for high-density data storage but less efficient for random access tasks. NAND flash
4988-513: Is thus highly suitable for use in mass-storage devices, such as memory cards and solid-state drives (SSD). For example, SSDs store data using multiple NAND flash memory chips. The first NAND-based removable memory card format was SmartMedia , released in 1995. Many others followed, including MultiMediaCard , Secure Digital , Memory Stick , and xD-Picture Card . A new generation of memory card formats, including RS-MMC , miniSD and microSD , feature extremely small form factors. For example,
5104-485: Is used in computers , PDAs , digital audio players , digital cameras , mobile phones , synthesizers , video games , scientific instrumentation , industrial robotics , and medical electronics . Flash memory has a fast read access time but it is not as fast as static RAM or ROM. In portable devices, it is preferred to use flash memory because of its mechanical shock resistance since mechanical drives are more prone to mechanical damage. Because erase cycles are slow,
5220-544: The NOR and NAND logic gates . Both use the same cell design, consisting of floating-gate MOSFETs . They differ at the circuit level depending on whether the state of the bit line or word lines is pulled high or low: in NAND flash, the relationship between the bit line and the word lines resembles a NAND gate; in NOR flash, it resembles a NOR gate. Flash memory, a type of floating-gate memory,
5336-507: The PowerPC architecture developed by the AIM alliance . This was seen as a win for Intel; an analyst called the move "risky" and "foolish", as Intel's current offerings at the time were considered to be behind those of AMD and IBM. In 2006, Intel unveiled its Core microarchitecture to widespread critical acclaim; the product range was perceived as an exceptional leap in processor performance that at
5452-587: The Semiconductor Chip Protection Act of 1984 , a law sought by Intel and the Semiconductor Industry Association (SIA). During the late 1980s and 1990s (after this law was passed), Intel also sued companies that tried to develop competitor chips to the 80386 CPU . The lawsuits were noted to significantly burden the competition with legal bills, even if Intel lost the suits. Antitrust allegations had been simmering since
5568-480: The U.S. Department of Defense is another large customer for Intel. In September 2024, Intel reportedly qualified for as much as $ 3.5 billion in federal grants to make semiconductors for the Defense Department. According to IDC , while Intel enjoyed the biggest market share in both the overall worldwide PC microprocessor market (73.3%) and the mobile PC microprocessor (80.4%) in the second quarter of 2011,
5684-489: The Zen microarchitecture and a new chiplet -based design to critical acclaim. Since its introduction, AMD, once unable to compete with Intel in the high-end CPU market, has undergone a resurgence, and Intel's dominance and market share have considerably decreased. In addition, Apple began to transition away from the x86 architecture and Intel processors to their own Apple silicon for their Macintosh computers in 2020. The transition
5800-406: The dominant supplier of PC microprocessors, with a market share of 90%, and was known for aggressive and anti-competitive tactics in defense of its market position, particularly against AMD , as well as a struggle with Microsoft for control over the direction of the PC industry. Since the 2000s and especially since the late 2010s, Intel has faced increasing competition, which has led to
5916-519: The semiconductor memory market, widely predicted to replace magnetic-core memory . Its first product, a quick entry into the small, high-speed memory market in 1969, was the 3101 Schottky TTL bipolar 64-bit static random-access memory (SRAM), which was nearly twice as fast as earlier Schottky diode implementations by Fairchild and the Electrotechnical Laboratory in Tsukuba, Japan . In
SECTION 50
#17331057270066032-457: The x86 processor market is AMD, with which Intel has had full cross-licensing agreements since 1976: each partner can use the other's patented technological innovations without charge after a certain time. However, the cross-licensing agreement is canceled in the event of an AMD bankruptcy or takeover. Some smaller competitors, such as VIA Technologies, produce low-power x86 processors for small factor computers and portable equipment. However,
6148-498: The "1" state), a large voltage of the opposite polarity is applied between the CG and source terminal, pulling the electrons off the FG through Fowler–Nordheim tunneling (FN tunneling). This is known as Negative gate source source erase. Newer NOR memories can erase using negative gate channel erase, which biases the wordline on a NOR memory cell block and the P-well of the memory cell block to allow FN tunneling to be carried out, erasing
6264-712: The 1970s. However, early floating-gate memory required engineers to build a memory cell for each bit of data, which proved to be cumbersome, slow, and expensive, restricting floating-gate memory to niche applications in the 1970s, such as military equipment and the earliest experimental mobile phones . Modern EEPROM based on Fowler-Nordheim tunnelling to erase data was invented by Bernward and patented by Siemens in 1974. And further developed between 1976 and 1978 by Eliyahou Harari at Hughes Aircraft Company and George Perlegos and others at Intel. This led to Masuoka's invention of flash memory at Toshiba in 1980. The improvement between EEPROM and flash being that flash
6380-459: The 22 nm Tri-Gate process. Several other customers also exist but were not announced at the time. The foundry business was closed in 2018 due to Intel's issues with its manufacturing. Intel continued its tick-tock model of a microarchitecture change followed by a die shrink until the 6th-generation Core family based on the Skylake microarchitecture. This model was deprecated in 2016, with
6496-438: The FG is charged. The binary value of the cell is sensed by determining whether there is current flowing through the transistor when V I is asserted on the CG. In a multi-level cell device, which stores more than one bit per cell, the amount of current flow is sensed (rather than simply its presence or absence), in order to determine more precisely the level of charge on the FG. Floating gate MOSFETs are so named because there
6612-537: The I/O interface of NAND flash does not provide a random-access external address bus. Rather, data must be read on a block-wise basis, with typical block sizes of hundreds to thousands of bits. This makes NAND flash unsuitable as a drop-in replacement for program ROM, since most microprocessors and microcontrollers require byte-level random access. In this regard, NAND flash is similar to other secondary data storage devices , such as hard disks and optical media , and
6728-595: The UN Broadband Commission's worldwide target of 5% of monthly income. In April 2011, Intel began a pilot project with ZTE Corporation to produce smartphones using the Intel Atom processor for China's domestic market. In December 2011, Intel announced that it reorganized several of its business units into a new mobile and communications group that would be responsible for the company's smartphone, tablet, and wireless efforts. Intel planned to introduce Medfield –
6844-682: The United States. Intel was incorporated in Mountain View, California , on July 18, 1968, by Gordon E. Moore (known for " Moore's law "), a chemist ; Robert Noyce , a physicist and co-inventor of the integrated circuit ; and Arthur Rock , an investor and venture capitalist . Moore and Noyce had left Fairchild Semiconductor , where they were part of the " traitorous eight " who founded it. There were originally 500,000 shares outstanding of which Dr. Noyce bought 245,000 shares, Dr. Moore 245,000 shares, and Mr. Rock 10,000 shares; all at $ 1 per share. Rock offered $ 2,500,000 of convertible debentures to
6960-644: The Xeon 6 processor, aiming for better performance and power efficiency compared to its predecessor. Intel's Gaudi 2 and Gaudi 3 AI accelerators were revealed to be more cost-effective than competitors' offerings. Additionally, Intel disclosed architecture details for its Lunar Lake processors for AI PCs, which were released on September 24, 2024. Flash memory Flash memory is an electronic non-volatile computer memory storage medium that can be electrically erased and reprogrammed. The two main types of flash memory, NOR flash and NAND flash , are named for
7076-584: The advent of such mobile computing devices, in particular, smartphones , has led to a decline in PC sales . Since over 95% of the world's smartphones currently use processors cores designed by Arm , using the Arm instruction set , Arm has become a major competitor for Intel's processor market. Arm is also planning to make attempts at setting foot into the PC and server market, with Ampere and IBM each individually designing CPUs for servers and supercomputers . The only other major competitor in processor instruction sets
SECTION 60
#17331057270067192-402: The assumption of unspecified liabilities. The move was intended to permit Intel to focus its resources on its core x86 and server businesses, and the acquisition completed on November 9, 2006. In 2008, Intel spun off key assets of a solar startup business effort to form an independent company, SpectraWatt Inc. In 2011, SpectraWatt filed for bankruptcy. In February 2011, Intel began to build
7308-466: The cell block. Older memories used source erase, in which a high voltage was applied to the source and then electrons from the FG were moved to the source. Modern NOR flash memory chips are divided into erase segments (often called blocks or sectors). The erase operation can be performed only on a block-wise basis; all the cells in an erase segment must be erased together. Programming of NOR cells, however, generally can be performed one byte or word at
7424-502: The cell by increasing the MOSFET's threshold voltage. This, in turn, changes the drain-source current that flows through the transistor for a given gate voltage, which is ultimately used to encode a binary value. The Fowler-Nordheim tunneling effect is reversible, so electrons can be added to or removed from the floating gate, processes traditionally known as writing and erasing. Despite the need for relatively high programming and erasing voltages, virtually all flash chips today require only
7540-402: The cells are logically set to 1. Data can only be programmed in one pass to a page in a block that was erased. The programming process is set one or more cells from 1 to 0. Any cells that have been set to 0 by programming can only be reset to 1 by erasing the entire block. This means that before new data can be programmed into a page that already contains data, the current contents of the page plus
7656-420: The companies to split the revenue from those facilities. On January 31, 2023, as part of $ 3 billion in cost reductions, Intel announced pay cuts affecting employees above midlevel, ranging from 5% upwards. It also suspended bonuses and merit pay increases, while reducing retirement plan matching. These cost reductions followed layoffs announced in the fall of 2022. In October 2023, Intel confirmed it would be
7772-451: The company as NM Electronics on July 18, 1968, but by the end of the month had changed the name to Intel , which stood for Int egrated El ectronics. Since "Intel" was already trademarked by the hotel chain Intelco, they had to buy the rights for the name. At its founding, Intel was distinguished by its ability to make logic circuits using semiconductor devices . The founders' goal was
7888-425: The company's focus to microprocessors and to change fundamental aspects of that business model. Moore's decision to sole-source Intel's 386 chip played into the company's continuing success. By the end of the 1980s, buoyed by its fortuitous position as microprocessor supplier to IBM and IBM's competitors within the rapidly growing personal computer market , Intel embarked on a 10-year period of unprecedented growth as
8004-584: The control or periphery circuitry. This increases the number of IO operations per flash chip or die, but it also introduces challenges when building capacitors for charge pumps used to write to the flash memory. Some flash dies have as many as 6 planes. As of August 2017, microSD cards with a capacity up to 400 GB (400 billion bytes) are available. The same year, Samsung combined 3D IC chip stacking with its 3D V-NAND and TLC technologies to manufacture its 512 GB KLUFG8R1EM flash memory chip with eight stacked 64-layer V-NAND chips. In 2019, Samsung produced
8120-404: The core of the removable USB storage devices known as USB flash drives , as well as most memory card formats and solid-state drives available today. The hierarchical structure of NAND flash starts at a cell level which establishes strings, then pages, blocks, planes and ultimately a die. A string is a series of connected NAND cells in which the source of one cell is connected to the drain of
8236-560: The early 1980s, and manufacturing and development centers in China, India, and Costa Rica in the 1990s. By the early 1980s, its business was dominated by DRAM chips. However, increased competition from Japanese semiconductor manufacturers had, by 1983, dramatically reduced the profitability of this market. The growing success of the IBM personal computer, based on an Intel microprocessor, was among factors that convinced Gordon Moore (CEO since 1975) to shift
8352-506: The early 1990s and had been the cause of one lawsuit against Intel in 1991. In 2004 and 2005, AMD brought further claims against Intel related to unfair competition . In 2005, CEO Paul Otellini reorganized the company to refocus its core processor and chipset business on platforms (enterprise, digital home, digital health, and mobility). On June 6, 2005, Steve Jobs , then CEO of Apple , announced that Apple would be using Intel's x86 processors for its Macintosh computers, switching from
8468-418: The fastest consumer CPUs, as well as its Intel Arc series of GPUs. The Open Source Technology Center at Intel hosts PowerTOP and LatencyTOP , and supports other open source projects such as Wayland , Mesa , Threading Building Blocks (TBB), and Xen . Intel was founded on July 18, 1968, by semiconductor pioneers Gordon Moore (of Moore's law ) and Robert Noyce , along with investor Arthur Rock , and
8584-497: The first commercial NOR type flash chip in 1988. NOR-based flash has long erase and write times, but provides full address and data buses , allowing random access to any memory location . This makes it a suitable replacement for older read-only memory (ROM) chips, which are used to store program code that rarely needs to be updated, such as a computer's BIOS or the firmware of set-top boxes . Its endurance may be from as little as 100 erase cycles for an on-chip flash memory, to
8700-653: The first commercial user of high-NA EUV lithography tool, as part of its plan to regain process leadership from TSMC . In August 2024, following a below-expectations Q2 earnings announcement, Intel announced "significant actions to reduce our costs. We plan to deliver $ 10 billion in cost savings in 2025, and this includes reducing our head count by roughly 15,000 roles, or 15% of our workforce." In December 2023, Intel unveiled Gaudi3, an artificial intelligence (AI) chip for generative AI software which will launch in 2024 and compete with rival chips from Nvidia and AMD. On 4 June 2024, Intel announced AI chips for data centers,
8816-445: The first commercially available dynamic random-access memory (DRAM), the 1103 released in 1970, solved these issues. The 1103 was the bestselling semiconductor memory chip in the world by 1972, as it replaced core memory in many applications. Intel's business grew during the 1970s as it expanded and improved its manufacturing processes and produced a wider range of products , still dominated by various memory devices. Intel created
8932-409: The first commercially available microprocessor, the Intel 4004 , in 1971. The microprocessor represented a notable advance in the technology of integrated circuitry, as it miniaturized the central processing unit of a computer, which then made it possible for small machines to perform calculations that in the past only very large machines could do. Considerable technological innovation was needed before
9048-462: The flash storage device (such as SSD ), the data actually written to the flash memory may be 0011 1100. Vertical NAND (V-NAND) or 3D NAND memory stacks memory cells vertically and uses a charge trap flash architecture. The vertical layers allow larger areal bit densities without requiring smaller individual cells. It is also sold under the trademark BiCS Flash , which is a trademark of Kioxia Corporation (formerly Toshiba Memory Corporation). 3D NAND
9164-418: The floating gate. This is why data retention goes down and the risk of data loss increases with increasing degradation. The silicon oxide in a cell degrades with every erase operation. The degradation increases the amount of negative charge in the cell over time due to trapped electrons in the oxide and negates some of the control gate voltage, this over time also makes erasing the cell slower, so to maintain
9280-634: The group. The feature is intended to facilitate more in-depth discussions on specific threats, particular industries, and different regions of the world. Threat data from groups can also be distributed to subscribers of managed service providers using OTX." OTX is a big data platform that integrates natural language processing and machine learning to facilitate the collection and correlation of data from many sources, including third-party threat feeds, websites, external API and local agents. In 2015, AlienVault partnered with Intel to coordinate real-time threat information on OTX. A similar deal with Hewlett Packard
9396-435: The high Vpp voltage for all flash chips in an SSD with a single shared external boost converter. In spacecraft and other high-radiation environments, the on-chip charge pump is the first part of the flash chip to fail, although flash memories will continue to work – in read-only mode – at much higher radiation levels. In NOR flash, each cell has one end connected directly to ground, and
9512-415: The higher charged FG threshold voltage (V T2 ) by changing the FG charge. In order to read a value from the cell, an intermediate voltage (V I ) between V T1 and V T2 is applied to the CG. If the channel conducts at V I , the FG must be uncharged (if it were charged, there would not be conduction because V I is less than V T2 ). If the channel does not conduct at the V I , it indicates that
9628-810: The large block sizes used in flash memory erasing give it a significant speed advantage over non-flash EEPROM when writing large amounts of data. As of 2019, flash memory costs greatly less than byte-programmable EEPROM and had become the dominant memory type wherever a system required a significant amount of non-volatile solid-state storage . EEPROMs, however, are still used in applications that require only small amounts of storage, e.g. in SPD implementations on computer memory modules. Flash memory packages can use die stacking with through-silicon vias and several dozen layers of 3D TLC NAND cells (per die) simultaneously to achieve capacities of up to 1 tebibyte per package using 16 stacked dies and an integrated flash controller as
9744-659: The microSD card has an area of just over 1.5 cm , with a thickness of less than 1 mm. NAND flash has achieved significant levels of memory density as a result of several major technologies that were commercialized during the late 2000s to early 2010s. NOR flash was the most common type of Flash memory sold until 2005, when NAND flash overtook NOR flash in sales. Multi-level cell (MLC) technology stores more than one bit in each memory cell . NEC demonstrated multi-level cell (MLC) technology in 1998, with an 80 Mb flash memory chip storing 2 bits per cell. STMicroelectronics also demonstrated MLC in 2000, with
9860-526: The microprocessor could actually become the basis of what was first known as a "mini computer" and then known as a "personal computer". Intel also created one of the first microcomputers in 1973. Intel opened its first international manufacturing facility in 1972, in Malaysia , which would host multiple Intel operations, before opening assembly facilities and semiconductor plants in Singapore and Jerusalem in
9976-422: The most important threats. OTX combines social contributions with automated machine-to-machine tools that integrates with major security products such as firewalls and perimeter security hardware. The platform can read security report in .pdf, .csv, .json and other open formats. Relevant information is extracted automatically, assisting IT professionals to more readily analyze data. Specific OTX components include
10092-422: The new data must be copied to a new, erased page. If a suitable erased page is available, the data can be written to it immediately. If no erased page is available, a block must be erased before copying the data to a page in that block. The old page is then marked as invalid and is available for erasing and reuse. This is different from operating system LBA view, for example, if operating system writes 1100 0011 to
10208-414: The next one. Depending on the NAND technology, a string typically consists of 32 to 128 NAND cells. Strings are organised into pages which are then organised into blocks in which each string is connected to a separate line called a bitline. All cells with the same position in the string are connected through the control gates by a wordline. A plane contains a certain number of blocks that are connected through
10324-474: The nitride, leading to degradation. Leakage is exacerbated at high temperatures since electrons become more excited with increasing temperatures. CTF technology however still uses a tunneling oxide and blocking layer which are the weak points of the technology, since they can still be damaged in the usual ways (the tunnel oxide can be degraded due to extremely high electric fields and the blocking layer due to Anode Hot Hole Injection (AHHI). Degradation or wear of
10440-605: The node. The first microprocessor under that node, Cannon Lake (marketed as 8th-generation Core), was released in small quantities in 2018. The company first delayed the mass production of their 10 nm products to 2017. They later delayed mass production to 2018, and then to 2019. Despite rumors of the process being cancelled, Intel finally introduced mass-produced 10 nm 10th-generation Intel Core mobile processors (codenamed " Ice Lake ") in September 2019. Intel later acknowledged that their strategy to shrink to 10 nm
10556-413: The number of bits increases, the number of possible states also increases and thus the cell is less tolerant of adjustments to programming voltages, because there is less space between the voltage levels that define each state in a cell. The process of moving electrons from the control gate and into the floating gate is called Fowler–Nordheim tunneling , and it fundamentally changes the characteristics of
10672-491: The numbers decreased by 1.5% and 1.9% compared to the first quarter of 2011. Intel's market share decreased significantly in the enthusiast market as of 2019, and they have faced delays for their 10 nm products. According to former Intel CEO Bob Swan, the delay was caused by the company's overly aggressive strategy for moving to its next node. In the 1980s, Intel was among the world's top ten sellers of semiconductors (10th in 1987 ). Along with Microsoft Windows , it
10788-516: The other end connected directly to a bit line. This arrangement is called "NOR flash" because it acts like a NOR gate: when one of the word lines (connected to the cell's CG) is brought high, the corresponding storage transistor acts to pull the output bit line low. NOR flash continues to be the technology of choice for embedded applications requiring a discrete non-volatile memory device. The low read latencies characteristic of NOR devices allow for both direct code execution and data storage in
10904-435: The oxides is the reason why flash memory has limited endurance, and data retention goes down (the potential for data loss increases) with increasing degradation, since the oxides lose their electrically insulating characteristics as they degrade. The oxides must insulate against electrons to prevent them from leaking which would cause data loss. In 1991, NEC researchers including N. Kodama, K. Oyama and Hiroki Shirai described
11020-413: The performance and reliability of the NAND chip, the cell must be retired from use. Endurance also decreases with the number of bits in a cell. With more bits in a cell, the number of possible states (each represented by a different voltage level) in a cell increases and is more sensitive to the voltages used for programming. Voltages may be adjusted to compensate for degradation of the silicon oxide, and as
11136-670: The primary and most profitable hardware supplier to the PC industry, part of the winning 'Wintel' combination. Moore handed over his position as CEO to Andy Grove in 1987. By launching its Intel Inside marketing campaign in 1991, Intel was able to associate brand loyalty with consumer selection, so that by the end of the 1990s, its line of Pentium processors had become a household name. After 2000, growth in demand for high-end microprocessors slowed. Competitors, most notably AMD (Intel's largest competitor in its primary x86 architecture market), garnered significant market share, initially in low-end and mid-range processors but ultimately across
11252-514: The product range, and Intel's dominant position in its core market was greatly reduced, mostly due to controversial NetBurst microarchitecture. In the early 2000s then-CEO, Craig Barrett attempted to diversify the company's business beyond semiconductors, but few of these activities were ultimately successful. Bob had also for a number of years been embroiled in litigation. U.S. law did not initially recognize intellectual property rights related to microprocessor topology (circuit layouts), until
11368-454: The relatively thin oxide, gradually degrading its electrically insulating properties and allowing electrons to be trapped in and pass through freely (leak) from the floating gate into the oxide, increasing the likelihood of data loss since the electrons (the quantity of which is used to represent different charge levels, each assigned to a different combination of bits in MLC Flash) are normally in
11484-531: The release of the 7th-generation Core family (codenamed Kaby Lake ), ushering in the process–architecture–optimization model . As Intel struggled to shrink their process node from 14 nm to 10 nm , processor development slowed down and the company continued to use the Skylake microarchitecture until 2020, albeit with optimizations. While Intel originally planned to introduce 10 nm products in 2016, it later became apparent that there were manufacturing issues with
11600-410: The same bitline. A flash die consists of one or more planes, and the peripheral circuitry that is needed to perform all the read, write, and erase operations. The architecture of NAND flash means that data can be read and programmed (written) in pages, typically between 4 KiB and 16 KiB in size, but can only be erased at the level of entire blocks consisting of multiple pages. When a block is erased, all
11716-407: The same silicon nitride material. An individual memory cell is made up of one planar polysilicon layer containing a hole filled by multiple concentric vertical cylinders. The hole's polysilicon surface acts as the gate electrode. The outermost silicon dioxide cylinder acts as the gate dielectric, enclosing a silicon nitride cylinder that stores charge, in turn enclosing a silicon dioxide cylinder as
11832-405: The same year, Intel also produced the 3301 Schottky bipolar 1024-bit read-only memory (ROM) and the first commercial metal–oxide–semiconductor field-effect transistor (MOSFET) silicon gate SRAM chip, the 256-bit 1101. While the 1101 was a significant advance, its complex static cell structure made it too slow and costly for mainframe memories. The three- transistor cell implemented in
11948-508: The site for a major new manufacturing facility. The facility will cost at least $ 20 billion. The company expects the facility to begin producing chips by 2025. The same year Intel also choose Magdeburg , Germany , as a site for two new chip mega factories for €17 billion (topping Tesla 's investment in Brandenburg ). The start of the construction was initially planned for 2023, but this has been postponed to late 2024, while production start
12064-498: The smartphone market. Finding itself with excess fab capacity after the failure of the Ultrabook to gain market traction and with PC sales declining, in 2013 Intel reached a foundry agreement to produce chips for Altera using a 14 nm process. General Manager of Intel's custom foundry division Sunit Rikhi indicated that Intel would pursue further such deals in the future. This was after poor sales of Windows 8 hardware caused
12180-449: The success of the PC in the early 1990s that this became its primary business. During the 1990s, the partnership between Microsoft Windows and Intel, known as " Wintel ", became instrumental in shaping the PC landscape and solidified Intel's position on the market. As a result, Intel invested heavily in new microprocessor designs in the mid to late 1990s, fostering the rapid growth of the computer industry . During this period, it became
12296-418: The tunnel dielectric that surrounds a central rod of conducting polysilicon which acts as the conducting channel. Memory cells in different vertical layers do not interfere with each other, as the charges cannot move vertically through the silicon nitride storage medium, and the electric fields associated with the gates are closely confined within each layer. The vertical collection is electrically identical to
12412-400: The twelve months ending December 31, 2020, at 2,882 Kt (+94/+3.4% y-o-y). Intel plans to reduce carbon emissions 10% by 2030 from a 2020 base year. Intel has self-reported that they have Wafer fabrication plants in the United States, Ireland , and Israel. They have also self-reported that they have assembly and testing sites mostly in China, Costa Rica, Malaysia, and Vietnam, and one site in
12528-408: Was Andy Grove , a chemical engineer , who later ran the company through much of the 1980s and the high-growth 1990s. In deciding on a name, Moore and Noyce quickly rejected "Moore Noyce", near homophone for "more noise" – an ill-suited name for an electronics company, since noise in electronics is usually undesirable and typically associated with bad interference . Instead, they founded
12644-547: Was a thing of the past and that they would now support all "tier-one operating systems" such as Linux, Android, iOS, and Chrome. In 2014, Intel cut thousands of employees in response to "evolving market trends", and offered to subsidize manufacturers for the extra costs involved in using Intel chips in their tablets. In April 2016, Intel cancelled the SoFIA platform and the Broxton Atom SoC for smartphones, effectively leaving
12760-636: Was announced the same year. Both Facebook and IBM have threat exchange platforms. The Facebook ThreatExchange is in beta and requires an application or invitation to join. IBM launched IBM X-Force Exchange in April 2015. Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California , and incorporated in Delaware . Intel designs, manufactures, and sells computer components and related products for business and consumer markets. It
12876-417: Was first announced by Toshiba in 2007. V-NAND was first commercially manufactured by Samsung Electronics in 2013. V-NAND uses a charge trap flash geometry (which was commercially introduced in 2002 by AMD and Fujitsu ) that stores charge on an embedded silicon nitride film. Such a film is more robust against point defects and can be made thicker to hold larger numbers of electrons. V-NAND wraps
12992-616: Was invented by Fujio Masuoka at Toshiba in 1980 and is based on EEPROM technology. Toshiba began marketing flash memory in 1987. EPROMs had to be erased completely before they could be rewritten. NAND flash memory, however, may be erased, written, and read in blocks (or pages), which generally are much smaller than the entire device. NOR flash memory allows a single machine word to be written – to an erased location – or read independently. A flash memory device typically consists of one or more flash memory chips (each holding many flash memory cells), along with
13108-505: Was launched in October 2013 and Intel is part of the coalition of public and private organizations that also includes Facebook , Google , and Microsoft . Led by Sir Tim Berners-Lee , the A4AI seeks to make Internet access more affordable so that access is broadened in the developing world, where only 31% of people are online. Google will help to decrease Internet access prices so that they fall below
13224-955: Was part of the " Wintel " personal computer domination in the 1990s and early 2000s. In 1992, Intel became the biggest semiconductor chip maker by revenue and held the position until 2018 when Samsung Electronics surpassed it, but Intel returned to its former position the year after. Other major semiconductor companies include TSMC , GlobalFoundries , Texas Instruments , ASML , STMicroelectronics , United Microelectronics Corporation (UMC), Micron , SK Hynix , Kioxia , and SMIC . Intel's competitors in PC chipsets included AMD , VIA Technologies , Silicon Integrated Systems , and Nvidia . Intel's competitors in networking include NXP Semiconductors , Infineon , Broadcom Limited , Marvell Technology Group and Applied Micro Circuits Corporation , and competitors in flash memory included Spansion , Samsung Electronics, Qimonda , Kioxia, STMicroelectronics, Micron , and SK Hynix . The only major competitor in
13340-401: Was reported that all Intel processors made since 1995 (besides Intel Itanium and pre-2013 Intel Atom ) had been subject to two security flaws dubbed Meltdown and Spectre. Due to Intel's issues with its 10 nm process node and the company's slow processor development, the company now found itself in a market with intense competition. The company's main competitor, AMD, introduced
13456-428: Was too aggressive. While other foundries used up to four steps in 10 nm or 7 nm processes, the company's 10 nm process required up to five or six multi-pattern steps. In addition, Intel's 10 nm process is denser than its counterpart processes from other foundries. Since Intel's microarchitecture and process node development were coupled, processor development stagnated. In early January 2018, it
#5994