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7-458: Originally, CSP was the acronym for chip-size packaging. Since only a few packages are chip size, the meaning of the acronym was adapted to chip-scale packaging . According to IPC 's standard J-STD-012, Implementation of Flip Chip and Chip Scale Technology , in order to qualify as chip scale, the package must have an area no greater than 1.2 times that of the die and it must be a single-die, direct surface mountable package. Another criterion that

14-545: Is accredited by the American National Standards Institute (ANSI) as a standards developing organization and is known globally for its standards. It publishes the most widely used acceptability standards in the electronics industry . It was founded in 1957 as the Institute of Printed Circuits. Its name was later changed to the Institute for Interconnecting and Packaging Electronic Circuits to highlight

21-426: Is often applied to qualify these packages as CSPs is their ball pitch should be no more than 1 mm. The concept was first proposed by Junichi Kasai of Fujitsu and Gen Murakami of Hitachi Cable in 1993. The first concept demonstration however came from Mitsubishi Electric . The die may be mounted on an interposer upon which pads or balls are formed, like with flip chip ball grid array (BGA) packaging, or

28-488: The expansion from bare boards to packaging and electronic assemblies. In 1999, the organization formally changed its name to IPC with the accompanying tagline, Association Connecting Electronics Industries . IPC standards are used by the electronics manufacturing industry. IPC-A-610, Acceptability of Electronic Assemblies , is used worldwide by original equipment manufacturers and EMS companies. There are more than 3600 trainers worldwide who are certified to train and test on

35-664: The following groups: IPC (electronics) IPC is a trade association whose aim is to standardize the assembly and production requirements of electronic equipment and assemblies. IPC is headquartered in Bannockburn, Illinois , United States with additional offices in Washington, D.C. Atlanta, Ga. , and Miami, Fla. in the United States, and overseas offices in China , Japan , Thailand , India , Germany , and Belgium . IPC

42-437: The pads may be etched or printed directly onto the silicon wafer , resulting in a package very close to the size of the silicon die: such a package is called a wafer-level package (WLP) or a wafer-level chip-scale package (WL-CSP). WL-CSP had been in development since 1990s, and several companies begun volume production in early 2000, such as Advanced Semiconductor Engineering (ASE). Chip scale packages can be classified into

49-660: The standard. Standards are created by committees of industry volunteers. Task groups have been formed in China, the United States, and Denmark. Standards published by IPC include: IPC members are eligible to participate in IPC’s statistical programs, which provide free monthly or quarterly reports for specific industry and product markets. Statistical programs cover the electronics manufacturing services (EMS), printed circuit board (PCB), laminate, process consumables, solder and assembly equipment segments. Annual reports are distributed for

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