Misplaced Pages

#574425

72-524: Development of the WDC 65C02 began in 1981 with samples released in early 1983. The 65C02 was officially released sometime shortly after. WDC licensed the design to Synertek , NCR , GTE Microcircuits , and Rockwell Semiconductor . Rockwell's primary interest was in the embedded market and asked for several new commands to be added to aid in this role. These were later copied back into the baseline version, at which point WDC added two new commands of their own to create

144-508: A Los Angeles area company who had no ties to the valley. During this time, Steve Jobs approached Synertek looking for a new 16-bit version of the 6502 processor for upcoming projects. Schreiner declined, feeling the company could not afford to develop it, but offered to do so if Apple would fund the project. Jobs declined, and noted that this would force Apple to move to the Motorola 68000 . When this finally came to pass, and Atari followed them

216-431: A device driver might list the entry points for OPEN , CLOSE , READ , etc in a table at $ A000 . READ is the third entry, zero indexed, and each address requires 16-bits, so to call READ one would use something similar to JMP ($ A004) . If the driver is updated and the subroutine code moves in memory, any existing code will still work as long as the table of pointers remains at $ A000 . The 65C02 adds

288-439: A 16-bit program counter (PC). In addition to the single accumulator, the first 256 bytes of RAM, the "zero page" ( $ 0000 to $ 00FF ), allow faster access through addressing modes that use an 8-bit memory address instead of a 16-bit address. The stack lies in the next 256 bytes, page one ($ 0100 to $ 01FF), and cannot be moved or extended. The stack grows backwards with the stack pointer (S) starting at $ 01FF and decrementing as

360-440: A 16-bit value from a given memory address and then jumps to the address in that 16-bit value. For instance, if memory location $ A000 holds $ 34 and $ A001 holds $ 12, JMP ($ A000) will read those two bytes, construct the value $ 1234 , and then jump to that location. One common use for indirect addressing is to build branch tables , a list of entry points for subroutines that can be accessed using an index. For instance,

432-450: A BRK (software interrupt) opcode at the same time a hardware interrupt occurs, the BRK will be ignored as the processor reacts to the hardware interrupt. The 65C02 correctly handles this situation by servicing the interrupt and then executing BRK. The 6502 has two indirect addressing modes which dereference through 16-bit addresses stored in page zero: A downside of this model is that if indexing

504-603: A better deal for competing chips from Japanese producer Toshiba. The first major effort of Mensch and his team was developing the WDC 65C02 , an enhanced version of the NMOS 6502 microprocessor. The 65C02, in addition to being implemented in CMOS circuit technology that reduced power use and improved noise immunity, added some new instructions , and corrected several defects in the NMOS 6502. The 65C02

576-415: A bug because the description of the original MOS Technology MCS6500 Programming Manual does not include an increment of the upper byte of the indirect address when a carry is generated out of the lower byte, while the same manual does explicitly specify that such a carry is propagated when incrementing a 16-bit address in other addressing modes such as plain and indexed Absolute modes, and it is consistent with

648-653: A graph indicates that typical devices are capable of operation at higher speeds than suggested by the AC characteristics table, and that reliable operation at 20 MHz should be readily attainable with V DD at 5 volts, assuming the supporting hardware will allow it. The W65C02S support for arbitrary clock rates allows it to use a clock that runs at a rate ideal for some other part of the system, such as 13.5 MHz (digital SDTV luma sampling rate), 14.31818 MHz (NTSC colour carrier frequency × 4), 14.75 MHz (PAL square pixels), 14.7456 (baud rate crystal), etc., as long as V DD

720-445: A later revision of the processor core that supports this instruction. A flaw that is present in all NMOS variants of the 6502 involves the jump instruction when using indirect addressing . In this addressing mode, the target address of the JMP instruction is fetched from memory, the jump vector, rather than being an operand to the JMP instruction. For example, JMP ($ 1234) would fetch

792-549: A major supplier of the 6502 as well. Atari was the company's largest customer for several years. The company also took out second source deals for the Philips / Signetics 2650 processor and the Zilog Z8 . In 1982, Synertek became the second source for Digital Equipment Corporation 's DCT11 microprocessor. Synertek acquired Microcomputer Associates, Incorporated , consisting of engineers Manny Lemas and Ray Holt , after which it

SECTION 10

#1733086114575

864-517: A new manager who was being fast-tracked through the company. His previous job was running a factory in Mexico that made valves for hot water heaters . The fab in Santa Cruz never became operational because the people who would be able to start it up refused to move out of the valley as they believed the company would disappear and they would be stranded. The fab was eventually purchased by Western Digital ,

936-410: A page boundary all NMOS variants will read from an invalid address before accessing the correct address. As with a R-M-W instruction, this behavior can cause problems when accessing hardware registers via indexing. The 65C02 fixed this problem by performing a dummy read of the instruction opcode when indexing crosses a page boundary. However, this fix introduced a new bug that occurs when the base address

1008-417: A program. By the early 1980s, the company was hollowed out. When both Apple and Atari turned to the Motorola 68000 , sales evaporated and they had no new products to offer. Honeywell closed the division in 1985. The company's initial products included custom-designed devices, and line of standard products, static RAMs , ROMs , dynamic and static shift registers , built using MOS / LSI technology. Early in

1080-507: A set of new instructions. Both WDC and Rockwell contributed improvements to the bit testing and manipulation functions in the 65C02. WDC added new addressing modes to the BIT instruction that was present in the 6502, as well two new instructions for convenient manipulation of bit fields, a common activity in device drivers. BIT in the 65C02 adds immediate mode, zero page indexed by X and absolute indexed by X addressing. Immediate mode addressing

1152-460: A software development system. The W65C02S–14 is the production version as of 2023, and is available in PDIP , PLCC and QFP packages. The maximum officially supported Ø2 (primary) clock speed is 14  MHz when operated at 5 volts, indicated by the –14 part number suffix (hobbyists have developed 65C02 homebrew systems that run faster than the official rating). The "S" designation indicates that

1224-745: Is a Senior Member of the Institute of Electrical and Electronics Engineers (IEEE). In 2004, he was inducted in the Computer Hall of Fame (hosted by the San Diego Computer Museum, part of the San Diego State University Library), and in 2005 was presented with a Lifetime Achievement Award from the University of Arizona's College of Engineering. Based on his participation in the basic circuit design, definition, and system design of

1296-472: Is intended to make the 65C02 well suited for low power system-on-chip (SoC) designs. A Verilog hardware description model is available for designing the W65C02S core into an application-specific integrated circuit (ASIC) or a field-programmable gate array (FPGA). As is common in the semiconductor industry, WDC offers a development system, which includes a developer board , an in-circuit emulator (ICE) and

1368-455: Is not needed but the address is in the zero page, one of the index registers must still be set to zero and used in one of these instructions. The 65C02 adds a non-indexed indirect addressing mode, e.g. LDA ($ 10) , to all instructions that can use indexed indirect and indirect indexed modes, freeing up the index registers. The 6502's JMP instruction has a unique (among 6502 instructions) addressing mode known as "absolute indirect" that reads

1440-406: Is on an even page boundary (which means indexing will never cross into the next page). With the new bug, a dummy read is performed on the base address prior to indexing, such that LDA $ 1200,X will do a dummy read on $ 1200 prior to the value of X being added to $ 1200 . Again, if indexing on hardware register addresses, this bug can result in undefined behavior. If an NMOS 6502 is fetching

1512-421: Is particularly convenient in that it is completely non-destructive. For example: may be used in place of: The AND operation changes the value in the accumulator, so the original value loaded from $ 1234 is lost. Using BIT leaves the value in the accumulator unchanged, so subsequent code can make additional tests against the original value, avoiding having to re-load the value from memory. In addition to

SECTION 20

#1733086114575

1584-513: Is sufficient to support the frequency. Designer Bill Mensch has pointed out that F MAX is affected by off-chip factors, such as the capacitive load on the microprocessor's pins. Minimizing load by using short signal tracks and fewest devices helps raise F MAX . The PLCC and QFP packages have less pin-to-pin capacitance than the PDIP package, and are more economical in the use of printed circuit board space. WDC has reported that FPGA realizations of

1656-604: Is thus one of the many "Fairchildren". The company became a major vendor during the late 1970s and early 1980s on the strength of their licensed production of the MOS 6502 , one of the most successful microprocessors of the era. Synertek won supply deals with Apple Computer and Atari , who would produce millions of home computer and games consoles with Synertek 6502's inside. Synertek's original production factories had been cobbled together with used equipment, and quickly ran out of capacity for ever-growing orders. The board of directors

1728-420: Is used for the new BBS instruction. Those which remain truly unused are equivalent to NOP s. 6502 programs using those opcodes will not work on the 65C02. The original 6502 had several errata when initially launched. Early 1975 versions of the processor had no ROR (rotate right) instruction, even though they did have ROL (rotate left). This was a deliberate design choice by MOS Technology, as it

1800-455: Is used in conjunction with an 8-bit offset. The same can be achieved in the NMOS version using indexed indirect mode, but only if the table is in the zero page, a limited resource. Allowing these tables to be constructed outside zero page not only lessens the demand for this resource but also allows the tables to be placed in ROM. In addition to the new addressing modes, the "base model" 65C02 also adds

1872-494: The WAI . The 65 SC 02 is a variant of the WDC 65C02 without bit instructions. Synertek Synertek, Inc. was an American semiconductor manufacturer founded in 1973. The initial staff consisted of Bob Schreiner (the CEO), Dan Floyd, Jack Balletto, and Gunnar Wetlesen and Zvi Grinfas. Schreiner, Floyd, Balletto and Wetlesen were all formerly of Fairchild Semiconductor , and Synertek

1944-447: The Motorola 6800 microprocessor and supporting computer chips, Mensch is a co-holder of several 6800 family patents, including the 6800 central processing unit (CPU), 6820/21 Peripheral Interface Adapter (PIA), 6850 Asynchronous Communications Interface Adapter (ACIA), and 6860 modem chip. He was the sole IC design engineer of the 6820/21 PIA, which was the first peripheral IC to have bit -programmable input/output (I/O). Before

2016-613: The W65C02 . Sanyo later licensed the design as well, and Seiko Epson produced a further modified version as the HuC6280 . Early versions used 40-pin DIP packaging, and were available in 1, 2 and 4 MHz versions, matching the speeds of the original nMOS versions. Later versions were produced in PLCC and QFP packages, as well as PDIP, and with much higher clock speed ratings. The current version from WDC,

2088-458: The W65C02S-14 has a fully static core and officially runs at speeds up to 14 MHz when powered at 5 volts. The 65C02 is a low cost, general-purpose 8-bit microprocessor (8-bit registers and data bus ) with a 16-bit program counter and address bus . The register set is small, with a single 8-bit accumulator (A), two 8-bit index registers (X and Y), an 8-bit status register (P), and

2160-550: The Western Design Center (WDC) in 1978, Commodore International contracted the company to develop what they called a "macro-micro", a macro-programmed complementary metal–oxide–semiconductor ( CMOS ) processor that could be used in a small and powerful calculator. However, WDC was unable to complete the project, and Commodore ended their relationship with the new company. Mensch claimed that Commodore never intended to use his design, and were instead seeking leverage to get

2232-625: The board of directors looking to raise about $ 250 million for a first-class fab, but was turned down. He then began looking for partners who might fund the expansion. Part of his pitch was that they should build the new fab in Santa Cruz instead of Silicon Valley . In the valley, their staff would constantly be raided by other companies, and Schreiner felt that by moving even the half-hour drive away, employees who worked there would be less likely to move back without more significant incentives. Standard Oil made an offer, but Honeywell offered to buy

WDC 65C02 - Misplaced Pages Continue

2304-584: The 1940s. By 1985 the company was a shell, with all the talent having left the company, no new designs, and no design capability. Honeywell shut down operations at Synertek that year. Synertek's semiconductor fabrication plant in Santa Clara, California operated from 1974 to 1985. The site, at 3050 Coronado Drive, was later found to be contaminated with organic solvents (including trichloroethane , trichloroethylene , and vinyl chloride ) and required Superfund cleanup to ameliorate hazardous releases into

2376-631: The 6502 architecture. His designs are used widely in embedded systems and implantable, electronic, life-support devices. Mensch graduated with an associate degree (A.S.) from Temple University in 1966 where he was a member of Sigma Pi fraternity. He received his Bachelor of Science (B.S.) degree in electrical engineering from the University of Arizona in Tucson in 1971. He has taught classes at Arizona State University , including courses on system on chip (SoC) integrated circuit (IC) design. Mensch

2448-405: The 6502. Motorola was still in the process of suing MOS over trade secrets, and there was the possibility that Synertek might lose access to the design if Motorola won, but the company had no direct connection to the design and could not be sued by Motorola, so Synertek went ahead. In the days leading up to the 1977 West Coast Computer Faire , Steve Wozniak chose to use a Synertek ROM chip for

2520-426: The 6502. He was met by Al Alcorn , who said they already knew of the design. Atari had already approached Intel and National Semiconductor , but neither would give them credit. Schreiner was happy to do so. By the end of the next year, Atari was putting in orders amounting to 120% of Synertek's annual capacity. Synertek then arranged Rockwell International to take up some of Atari's order, and Rockwell would become

2592-464: The 65C02 and see a similar improvement in performance, largely through avoided memory accesses through the use of fewer instructions to accomplish a given task. The original 6502 has 56 instructions, which, when combined with different addressing modes, produce a total of 151 opcodes of the possible 256 8-bit opcode patterns. The remaining 105 unused opcodes are undefined, with the set of codes with low-order 4-bits with 3, 7, B or F left entirely unused,

2664-485: The 6800 family, Mensch had worked on the Mostek 5065 processor. Along with three other engineers at MOS Technology, Mensch holds the patent on the decimal correct circuitry in the 6502 CPU. He was responsible for the design of basic circuits, oscillator , and buffer , transistor sizing, and instruction decode logic, wishing to minimize the number of levels of logic to achieve faster operation. During this time, when it

2736-608: The Apple II, which was revealed at the event, after a chip from American Microsystems, Inc. didn't arrive on time. Shortly after signing the deal with MOS, Schreiner's secretary told him two people were waiting in the office to talk to him. In walked Wozniak with Steve Jobs . Jobs explained that they were putting together a company to sell computer kits, and asked for a $ 30,000 line of credit so they could buy Synertek's 6502s. In spite of them being dressed in jeans and sandals with "these Indian bead things around their heads", Schreiner thought

2808-477: The NMOS 6502 will put the (N)egative, o(V)erflow and (Z)ero flags into officially undefined states. In reality, programmers have found empirically that the CPU updates these three flags to reflect the result of underlying binary arithmetic, that is, the flags reflect a result computed prior to the processor performing decimal correction. In contrast, the 65C02 sets these flags according to the result of decimal arithmetic, at

2880-457: The Processor, halts all processing until a hardware reset is issued. This can be used to put a system to "sleep" and then rapidly "wake" (reactivate) it with a reset. WAI t has a similar effect, halting all processing, but this instruction resumes normal execution on the reception of an interrupt. Without this instruction, waiting for a hardware interrupt generally involves running a loop suspend

2952-418: The W65C02S have been successfully operated at 200 MHz. Although the 65C02 can mostly be thought of as a low-power 6502, it also fixes several bugs found in the original and adds new instructions, addressing modes and features that can assist the programmer in writing smaller and faster-executing programs. It is estimated that the average 6502 assembly language program can be made 10 to 15 percent smaller on

WDC 65C02 - Misplaced Pages Continue

3024-476: The aquifer. In around 1983, construction began for an additional manufacturing facility in Santa Cruz, California . When market conditions deteriorated, primarily because of business downturns at Atari, work was stopped at the Santa Cruz facility and it was sold. Bill Mensch William David Mensch, Jr. (born February 9, 1945) is an American electrical engineer born in Quakertown, Pennsylvania . He

3096-556: The code with low-order 2 having only a single opcode. On the 6502, some of these leftover codes actually perform computation. Due to the way the 6502's instruction decoder works, simply setting certain bits in the opcode cause parts of the instruction processing to take place. Some of these opcodes immediately crash the processor, while other perform useful functions and were even given unofficial assembler mnemonics by some programmers. The 65C02 adds new opcodes that use some of these previously undocumented instruction slots. For example, $ FF

3168-429: The company outright after Schreiner told them that microprocessors were going to wipe them out if they didn't have their own production. Schreiner was sceptical it would work, as his experience at Fairchild had convinced him east-coast companies' attempts to remote control west-coast firms would not work. The CEO of Honeywell, Ed Spencer, convinced him the deal would be entirely hands-off. Schreiner then explained that there

3240-412: The company's history, Schreiner decided the company would not be able to develop a microprocessor of their own, not because of any technical limitations, but because they would not have the capability to build up the required support systems, especially software like compilers . He had noticed while working at General Electric 's computer division that the software was always late and overbudget and felt

3312-449: The cost of an extra clock cycle per arithmetic instruction. (Some writers assert that the V flag on the 65C02 is still incorrect in decimal mode, but the flag may also be considered to be meaningless because decimal arithmetic is always unsigned.) When executing a read-modify-write (R-M-W) instruction, such as INC addr , all NMOS variants will do a double write on addr , first rewriting the current value found at addr and then writing

3384-490: The design software needed, they sent a mainframe under a free rental agreement. The promised software never arrived. Around the same time, ranking members of the company started leaving as no option plan had emerged. When they attempted to hire new staff, no one would join for the same reason. Floyd, Balletto, and Wetlesen left the company shortly after Honeywell's acquisition and went on to co-found chip maker VLSI Technology . Schreiner left shortly thereafter. Honeywell put in

3456-525: The enhancements of the BIT instruction, WDC added two instructions designed to conveniently manipulate bit fields: Rockwell's changes added more bit manipulation instructions for any bit in zero page, to directly set or reset a bit with a 2-byte instruction, or to test and branch on a bit with a single 3-byte instruction. The new instructions were available from the start in Rockwell's R65C00 family, but were not part of

3528-416: The general design philosophy set forth in the manual that the chip architects may have intended that programmers would simply avoid trying to use any indirect address that crosses a page boundary, in order to save one clock cycle when performing indirect addressing. Nonetheless, many NMOS 650X users perceived this complication to be a weakness, so it was eliminated in the 65C02. Another by-design weakness that

3600-522: The idea was a good one based on his own experience building Heathkit systems. He agreed to the terms on the condition that if they were even one day late with a payment they would be on a cash on delivery basis from that day forward. Apple Computer was never a day late, and became a multi-million dollar customer for the company. Shortly thereafter, Jack Balletto, the company's marketing manager, convinced Schreiner to visit another up-and-coming company, Atari . Schreiner went to their offices to introduce

3672-464: The modified value. This behavior can result in difficult-to-resolve bugs if addr is a hardware register. This may occur if the hardware is watching for changes to the value in the register and then performs an action, in this case, it will perform two actions, one with the original value and then again with the new value. The 65C02 instead performs a double read of addr , followed by a single write. When performing indexed addressing, if indexing crosses

SECTION 50

#1733086114575

3744-412: The most significant byte of the target address from $ 00 of the original page rather than $ 00 of the new page. Hence JMP ($ 12FF) would get the least significant byte of the target address at $ 12FF and the most significant byte of the target address from $ 1200 rather than $ 1300 . The 65C02 corrected this issue. The undesirable behavior of the NMOS 650X JMP Indirect instruction may not be

3816-452: The new "indexed absolute indirect" mode which eases the use of branch tables. This mode adds the value of the X register to the absolute address and takes the 16-bit address from the resulting location. For instance, to access the READ function from the table above, one stores 4 in X, then executyes JMP ($ A000,X) . This style of access makes accessing branch tables simpler as a single base address

3888-465: The next year, Synertek's sales imploded. By this time the custom side of the company was long gone, the Honeywell mainframe still lacked design software, and they had no other modern processor design license. The only design added through this era was the low-end Zilog Z8 microcontroller , which Honeywell needed for a new line of programmable thermostats , replacing the original clockwork Chronotherm of

3960-505: The original 65C02 specification and not found in versions made by WDC or its other licensees. These were later copied back into the baseline design, and were available in later WDC versions. Rockwell-specific instructions are: Each of RMB , SMB , BBR , and BBS replaces a sequence of three instructions. In addition to the new commands above, WDC also added the STP and WAI instructions for supporting low-power modes. STP , STop

4032-793: The part has a fully static core , a feature that allows Ø2 to be slowed down or fully stopped in either the high or low state with no loss of data. Typical microprocessors not implemented in CMOS have dynamic cores and will lose their internal register contents (and thus crash) if they are not continuously clocked at a rate between some minimum and maximum specified values. The W65C02S may be operated at any convenient supply voltage (V DD ) between 1.8 and 5 volts (±5%). The data sheet AC characteristics table lists operational characteristics at 5 V at 14 MHz, 3.3 V or 3 V at 8 MHz, 2.5 V at 4 MHz, and 1.8 V at 2 MHz. This information may be an artifact of an earlier data sheet, as

4104-424: The processor enters the low-power state in a known location where all instructions are guaranteed to be complete, so when the interrupt arrives it cannot possibly interrupt an instruction and the interrupt response can be immediate. Plus, since the program expects the interrupt, the processor can safely continue without spending time saving state; the program is responsible to perform any necessary state-saving before

4176-480: The processor goes into low-power mode. When an interrupt is received, the processor immediately executes the JSR and handles the request. This has the added advantage of slightly improving performance. In the spinning case, the interrupt might arrive in the middle of one of the loop's instructions, and to allow it to restart after returning from the handler, the processor spends three cycles to save its location. With WAI ,

4248-427: The program until interrupt processing breaks out of the loop, sometimes known as " spinning ". This means the processor runs during the entire process, using power while doing (almost) nothing, even when no interrupts are occurring. In contrast, in the 65C02, interrupt code can be written by having a WAI followed immediately by a JSR or JMP to the handler. When the WAI is encountered, processing stops and

4320-461: The reset code. The 65C02 automatically clears this flag after pushing the status register onto the stack in response any interrupt or in response to a hardware reset, thus placing the processor back into binary arithmetic mode. This usually saves a few bytes in the software and eliminates the possibility of a common programming mistake (although it increases the size of any software that runs constantly in decimal mode). During decimal mode arithmetic,

4392-446: The same problem would kill their small company. Schreiner approached John Pavinen of MOS Technology , who had recently introduced the MOS 6502 series. He offered to cross-license Synertek's product line in exchange for the 6502. That would provide MOS with a second source agreement, something the market demanded at that time, while also giving them access to Synertek's existing line of designs that could be used as support chips for

SECTION 60

#1733086114575

4464-465: The stack grows. It has a variable-length instruction set , varying between one and three bytes per instruction. The basic architecture of the 65C02 is identical to the original 6502, and can be considered a low-power implementation of that design. At 1 MHz, the most popular speed for the original 6502, the 65C02 requires only 20 mW, while the original uses 450 mW, a reduction of over twenty times. The manually optimized core and low power use

4536-410: The value in memory locations $ 1234 (least significant byte) and $ 1235 (most significant byte) and load those values into the program counter , which would then cause the processor to continue execution at the address stored in the vector. The flaw, which some consider a bug, appears when the vector address ends in $ FF , which is the boundary of a memory page . In this case, JMP will fetch

4608-701: Was a major contributor to the design of the Motorola 6800 8-bit microprocessor and was part of the team led by Chuck Peddle that created the MOS Technology 6502 . He also designed the 16-bit successor to the 6502, the 65816 . Mensch is the founder, chairman, and chief executive officer (CEO) of the Western Design Center (WDC) located in Mesa, Arizona . Before founding WDC in 1978, Mensch held design engineering and management positions at Philco -Ford, Motorola , MOS Technology , and Integrated Circuit Engineering. At WDC, Mensch worked mainly on extending and expanding

4680-458: Was common to make errors during design, Chuck Peddle had praised Mensch as a skillful designer and engineer: «He built seven different chips without ever having an error, almost all done by hand. When I tell people that, they don't believe me, but it's true. This guy is a unique person. He is the best layout guy in the world.» Before leaving MOS Technology in 1977, Mensch became their microprocessor design manager. Shortly after Mensch founded

4752-405: Was deemed that implementing ROR was too costly in chip area for the benefits it provided. However, clients complained about the missing ROR and it was implemented in parts manufactured since June 1976. The absence of ROR especially hurt the performance of mantissa normalization in floating-point math routines. The vast majority of machines using the original (NMOS) processor family contain

4824-582: Was going to have to be some sort of stock option plan or similar, or their talent would leave. Spencer promised to come up with something. Honeywell completed the purchase in 1979. The deal soured almost immediately. To support their design efforts, Schreiner attempted to buy a PDP-11 , but the order was refused. Honeywell had recently entered the mainframe business, after purchasing the former General Electric computer division. That division worried that if Synertek bought from another company it would make people question their products. After promising to build

4896-744: Was later chosen as the core of the Ricoh 5A22 processor that powered the Super Nintendo Entertainment System . Mensch developed the Mensch Computer as a means to promote the W65C816S microprocessor. It was a system designed around the WDC W65C265S microcontroller, which contains a W65C816S core. The computer, which includes the Mensch Works software suite, was produced for a time by WDC and

4968-737: Was renamed Synertek Systems, Inc. and established as a subsidiary. In 1978, Synertek Systems released a 6502-based single board computer /evaluation kit called the SYM-1 , a derivative of MOS Technology/Commodore Semiconductor Group's KIM-1 . In order to remain competitive, the company needed to build a new chip making factory, or " fab ". Their existing fabs in the Sunnyvale area were not particularly good - Schreiner later described them as "mickey mouse" - built as needed and often using used equipment. Intel and NatSemi had better fabs and got higher yields, allowing them to produce chips for lower cost. He approached

5040-468: Was revised by popular demand, the state of the (D)ecimal flag in the NMOS 6502's status register is undefined after a reset or interrupt . This means programmers have to set the flag to a known value in order to avoid random errors caused by arithmetic operations performed in the mode other than the one intended, constititing software bugs. As a result, one finds a CLD instruction (CLear Decimal) in almost all 6502 interrupt handlers , as well as early in

5112-571: Was subsequently adopted for use in the Apple IIc computer and, later, in an enhanced version of the Apple IIe . Mensch's next design, which was to become an important product at WDC, was a 65C02-compatible 16-bit microprocessor, the 65C816 , later designated W65C816S. The 65C816's design came about following consultation with Apple and was adopted by them for use in the Apple IIGS computer. The 65C816

5184-416: Was unwilling to fund the construction of a new factory that could handle the demand. This led to a 1979 deal with Honeywell , who agreed to buy the company and operate Synertek as a hands-off division. This almost immediately led to problems when Honeywell's management failed to create a stock options program; top managers began to leave the company and they found it impossible to hire new talent without such

#574425