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Motorola 68040

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In computer architecture , 32-bit computing refers to computer systems with a processor , memory , and other major system components that operate on data in 32- bit units. Compared to smaller bit widths, 32-bit computers can perform large calculations more efficiently and process more data per clock cycle. Typical 32-bit personal computers also have a 32-bit address bus , permitting up to 4 GB of RAM to be accessed, far more than previous generations of system architecture allowed.

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64-512: The Motorola 68040 (" sixty-eight-oh-forty ") is a 32-bit microprocessor in the Motorola 68000 series , released in 1990. It is the successor to the 68030 and is followed by the 68060 , skipping the 68050. In keeping with general Motorola naming, the 68040 is often referred to as simply the '040 (pronounced oh-four-oh or oh-forty ). The 68040 was the first 680x0 family member with an on-chip Floating-Point Unit (FPU). It thus included all of

128-597: A 32-bit EISA bus that was backward compatible with the ISA-standard. EISA offered attractive features such as increased bandwidth, extended addressing, IRQ sharing, and card configuration through software (rather than through jumpers, DIP switches, etc.) However, EISA cards were expensive and therefore mostly employed in servers and workstations. Consumer desktops often used the simpler, faster VESA Local Bus (VLB). Unfortunately prone to electrical and timing-based instability; typical consumer desktops had ISA slots combined with

192-457: A Pentium OverDrive upgrade chip for 486 motherboards, which was a modified Pentium core that ran up to 83 MHz on boards with a 25 or 33 MHz front-side bus clock. OverDrive wasn't popular due to speed and price. New computers equipped with 486 processors in discount warehouses became scarce, and an IBM spokesperson called it a "dinosaur". Even after the Pentium series of processors gained

256-468: A 25 MHz i486 part. Just as in the i386, a flat 4 GB memory model could be implemented. All "segment selector" registers could be set to a neutral value in protected mode , or to zero in real mode , and using only the 32-bit "offset registers" (x86-terminology for general CPU registers used as address registers) as a linear 32-bit virtual address bypassing the segmentation logic. Virtual addresses were then normally mapped onto physical addresses by

320-501: A 40 MHz bus (486DX-40, 486DX/2-80, and 486DX/4-120) which had no Intel equivalent, as well as a part specified for 90 MHz, using a 30 MHz external clock, that was sold only to OEMs. The fastest running i486-compatible CPU, the Am5x86 , ran at 133 MHz and was released by AMD in 1995. 150 MHz and 160 MHz parts were planned but never officially released. Cyrix made a variety of i486-compatible processors, positioned at

384-403: A foothold in the market, however, Intel continued to produce 486 cores for industrial embedded applications. Intel discontinued production of i486 processors in late 2007. The instruction set of the i486 is very similar to the i386, with the addition of a few extra instructions, such as CMPXCHG, a compare-and-swap atomic operation , and XADD, a fetch-and-add atomic operation that returned

448-412: A less than optimal performance, due to the minimum hardware requirement of a Pentium processor. However, as they were overtaken by newer operating systems, i486 systems fell out of use except for backward compatibility with older programs (most notably games), especially given problems running on newer operating systems. However, DOSBox was available for later operating systems and provides emulation of

512-498: A mirror surface. HDR imagery allows for the reflection of highlights that can still be seen as bright white areas, instead of dull grey shapes. A 32-bit file format is a binary file format for which each elementary information is defined on 32 bits (or 4 bytes ). An example of such a format is the Enhanced Metafile Format . Intel 80486 The Intel 486 , officially named i486 and also known as 80486 ,

576-695: A single VLB slot for a video card. VLB was gradually replaced by PCI during the final years of the i486 period. Few Pentium class motherboards had VLB support as VLB was based directly on the i486 bus; much different from the P5 Pentium-bus. ISA persisted through the P5 Pentium generation and was not completely displaced by PCI until the Pentium III era, although ISA persisted well into the Pentium 4 era, especially among industrial PCs. Late i486 boards were normally equipped with both PCI and ISA slots, and sometimes

640-456: A single VLB slot. In this configuration, VLB or PCI throughput suffered depending on how buses were bridged. Initially, the VLB slot in these systems was usually fully compatible only with video cards (fitting as "VESA" stands for Video Electronics Standards Association ); VLB-IDE, multi I/O, or SCSI cards could have problems on motherboards with PCI slots. The VL-Bus operated at the same clock speed as

704-413: A total of 96 bits per pixel. 32-bit-per-channel images are used to represent values brighter than what sRGB color space allows (brighter than white); these values can then be used to more accurately retain bright highlights when either lowering the exposure of the image or when it is seen through a dark filter or dull reflection. For example, a reflection in an oil slick is only a fraction of that seen in

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768-498: Is a microprocessor introduced in 1989. It is a higher-performance follow-up to the Intel 386 . It represents the fourth generation of binary compatible CPUs following the 8086 of 1978, the Intel 80286 of 1982, and 1985's i386 . It was the first tightly- pipelined x86 design as well as the first x86 chip to include more than one million transistors. It offered a large on-chip cache and an integrated floating-point unit . When it

832-402: Is a 32-bit machine, with 32-bit registers and instructions that manipulate 32-bit quantities, but the external address bus is 36 bits wide, giving a larger address space than 4 GB, and the external data bus is 64 bits wide, primarily in order to permit a more efficient prefetch of instructions and data. Prominent 32-bit instruction set architectures used in general-purpose computing include

896-500: Is thus significantly faster than the 68030. Some mask revisions of the 68LC040 contained a bug that prevents the chip from operating correctly when a software FPU emulator is used. According to Motorola's errata, any chip with a mask set 2E71M or later does not contain the bug. This new mask was introduced in mid-1995 and converted the 68LC040 chip to MC status. The buggy revisions are typically found in 68LC040-based Apple Macintosh computers. Chips with mask set 2E23G (as used in

960-606: The 8088/8086 or 80286 , 16-bit microprocessors with a segmented address space where programs had to switch between segments to reach more than 64 kilobytes of code or data. As this is quite time-consuming in comparison to other machine operations, the performance may suffer. Furthermore, programming with segments tend to become complicated; special far and near keywords or memory models had to be used (with care), not only in assembly language but also in high level languages such as Pascal , compiled BASIC , Fortran , C , etc. The 80386 and its successors fully support

1024-466: The Celeron brand, though it continued to be produced for embedded systems through the late 2000s. In the general-purpose desktop computer role, i486-based machines remained in use into the early 2000s, especially as Windows 95 through 98 and Windows NT 4.0 were the last Microsoft operating systems to officially support i486-based systems. Windows 2000 could run on a i486-based machine, although with

1088-743: The IBM System/360 , IBM System/370 (which had 24-bit addressing), System/370-XA , ESA/370 , and ESA/390 (which had 31-bit addressing), the DEC VAX , the NS320xx , the Motorola 68000 family (the first two models of which had 24-bit addressing), the Intel IA-32 32-bit version of the x86 architecture, and the 32-bit versions of the ARM , SPARC , MIPS , PowerPC and PA-RISC architectures. 32-bit instruction set architectures used for embedded computing include

1152-536: The IBM System/360 Model 30 had an 8-bit ALU, 8-bit internal data paths, and an 8-bit path to memory, and the original Motorola 68000 had a 16-bit data ALU and a 16-bit external data bus, but had 32-bit registers and a 32-bit oriented instruction set. The 68000 design was sometimes referred to as 16/32-bit . However, the opposite is often true for newer 32-bit designs. For example, the Pentium Pro processor

1216-602: The NeXT computer. The 68040 processor is used in the flight management computers (FMC) aboard many Boeing 737 aircraft, including all Next Generation and MAX models. The 68040 ran into the transistor budget limit early in design. While the MMU did not take many transistors—indeed, having it on the same die as the CPU actually saved on transistors—the FPU certainly did. Motorola's 68882 external FPU

1280-448: The integer representation used. With the two most common representations, the range is 0 through 4,294,967,295 (2 − 1) for representation as an ( unsigned ) binary number , and −2,147,483,648 (−2 ) through 2,147,483,647 (2 − 1) for representation as two's complement . One important consequence is that a processor with 32-bit memory addresses can directly access at most 4  GiB of byte-addressable memory (though in practice

1344-488: The next-generation Pentium processor family. Certain steppings of the DX4 also officially supported 50 MHz bus operation, but it was a seldom-used feature. Processors compatible with the i486 were produced by companies such as IBM , Texas Instruments , AMD , Cyrix , UMC , and STMicroelectronics (formerly SGS-Thomson). Some were clones (identical at the microarchitectural level), others were clean room implementations of

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1408-475: The tape out on March 1. They received the first silicon from the fabrication on March 20. The i486 was announced at Spring Comdex in April 10, 1989. At the announcement, Intel stated that samples would be available in the third quarter and production quantities would ship in the fourth quarter. The first i486-based PCs were announced in late 1989. In fall of 1991, Intel introduced the 50 MHz i486 DX using

1472-532: The (short-lived) Macintosh Centris line also used the 68040, while the cheaper Quadra, Centris and Macintosh Performa used the 68LC040 . The 68040 was also used in other personal computers , such as the Amiga 4000 and Amiga 4000T , as well as a number of workstations , Alpha Microsystems servers, the HP 9000 /400 series, NCR Corporation 's TOWER 32/750, 32/825 and 32/850, Apollo Computer 's DN5500 , and later versions of

1536-533: The 16-bit segments of the 80286 but also segments for 32-bit address offsets (using the new 32-bit width of the main registers). If the base address of all 32-bit segments is set to 0, and segment registers are not used explicitly, the segmentation can be forgotten and the processor appears as having a simple linear 32-bit address space. Operating systems like Windows or OS/2 provide the possibility to run 16-bit (segmented) programs as well as 32-bit programs. The former possibility exists for backward compatibility and

1600-423: The 68000 family and ColdFire , x86, ARM, MIPS, PowerPC, and Infineon TriCore architectures. On the x86 architecture , a 32-bit application normally means software that typically (not necessarily) uses the 32-bit linear address space (or flat memory model ) possible with the 80386 and later chips. In this context, the term came about because DOS , Microsoft Windows and OS/2 were originally written for

1664-400: The 68020 and 68030, the chip's complexity and power requirements came from a large die and large caches. This affected the scaling of the processor and it was never able to run with a clock rate exceeding 40 MHz. A 50 MHz variant was planned, but canceled. Overclocking enthusiasts reported success reaching 50 MHz using a 100 MHz oscillator instead of an 80 MHz part and

1728-476: The FPU and MMU. Motorola had intended the EC variant for embedded use, but embedded processors during the 68040's time did not need the power of the 68040, so EC variants of the 68020 and 68030 continued to be common in designs. Motorola produced several speed grades. The 16 MHz and 20 MHz parts were never qualified (XC designation) and used as prototyping samples. 25 MHz and 33 MHz grades featured across

1792-521: The Intel chip. However, the i486 had the ability to be clocked significantly faster without overheating. Motorola 68040 performance lagged behind the later production i486 systems. Early i486-based computers were equipped with several ISA slots (using an emulated PC/AT-bus ) and sometimes one or two 8-bit -only slots (compatible with the PC/XT-bus). Many motherboards enabled overclocking of these from

1856-422: The Intel instruction set. (IBM's multiple-source requirement was one of the reasons behind its x86 manufacturing since the 80286.) The i486 was, however, covered by many Intel patents, including from the prior i386. Intel and IBM had broad cross-licenses of these patents, and AMD was granted rights to the relevant patents in the 1995 settlement of a lawsuit between the companies. AMD produced several clones using

1920-563: The LC 475) have been confirmed to be faulty. The fault relates to pending writes being lost when the F-line exception is triggered. The 68040 cannot update its microcode in the manner of modern x86 chips. This means that the only way to use software that requires floating-point functionality is to replace the buggy 68LC040 with a later revision, or a full 68040. ATC = Address Translation Cache 32-bit microprocessor 32-bit designs have been used since

1984-475: The cost-sensitive desktop and low-power (laptop) markets. Unlike AMD's 486 clones, the Cyrix processors were the result of clean-room reverse engineering. Cyrix's early offerings included the 486DLC and 486SLC, two hybrid chips that plugged into 386DX or SX sockets respectively, and offered 1 KB of cache (versus 8 KB for the then-current Intel/AMD parts). Cyrix also made "real" 486 processors, which plugged into

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2048-655: The default 6 or 8 MHz to perhaps 16.7 or 20 MHz (half the i486 bus clock) in several steps, often from within the BIOS setup. Especially older peripheral cards normally worked well at such speeds as they often used standard MSI chips instead of slower (at the time) custom VLSI designs. This could give significant performance gains (such as for old video cards moved from a 386 or 286 computer, for example). However, operation beyond 8 or 10 MHz could sometimes lead to stability problems, at least in systems equipped with SCSI or sound cards . Some motherboards came equipped with

2112-485: The earliest days of electronic computing, in experimental systems and then in large mainframe and minicomputer systems. The first hybrid 16/32-bit microprocessor , the Motorola 68000 , was introduced in the late 1970s and used in systems such as the original Apple Macintosh . Fully 32-bit microprocessors such as the HP FOCUS , Motorola 68020 and Intel 80386 were launched in the early to mid 1980s and became dominant by

2176-712: The early 1990s. This generation of personal computers coincided with and enabled the first mass-adoption of the World Wide Web . While 32-bit architectures are still widely-used in specific applications, the PC and server market has moved on to 64 bits with x86-64 and other 64-bit architectures since the mid-2000s with installed memory often exceeding the 32-bit 4G RAM address limits on entry level computers. The latest generation of smartphones have also switched to 64 bits. A 32-bit register can store 2 different values. The range of integer values that can be stored in 32 bits depends on

2240-574: The first decades of 32-bit architectures (the 1960s to the 1980s). Older 32-bit processor families (or simpler, cheaper variants thereof) could therefore have many compromises and limitations in order to cut costs. This could be a 16-bit ALU , for instance, or external (or internal) buses narrower than 32 bits, limiting memory size or demanding more cycles for instruction fetch, execution or write back. Despite this, such processors could be labeled 32-bit , since they still had 32-bit registers and instructions able to manipulate 32-bit quantities. For example,

2304-405: The functionality that previously required external chips, namely the FPU and Memory Management Unit (MMU), which was added in the 68030. It also had split instruction and data caches of 4 kilobytes each. It was fully pipelined , with six stages. Versions of the 68040 were created for specific market segments, including the 68LC040 , which removed the FPU, and the 68EC040 , which removed both

2368-426: The i386 or i286 per clock cycle . The i486's improved performance is thanks to its five-stage pipeline with all stages bound to a single cycle. The enhanced FPU unit on the chip was significantly faster than the i387 FPU per cycle. The i387 FPU was a separate, optional math coprocessor installed in a motherboard socket alongside the i386. The i486 was succeeded by the original Pentium . Orders were discontinued for

2432-508: The i486 design came in March 1992 with the release of the clock-doubled 486DX2 series. It was the first time that the CPU core clock frequency was separated from the system bus clock frequency by using a dual clock multiplier, supporting 486DX2 chips at 40 and 50 MHz. The faster 66 MHz 486DX2-66 was released that August. The fifth-generation Pentium processor launched in 1993, while Intel continued to produce i486 processors, including

2496-459: The i486 on March 30, 2007 and the last shipments were on September 28, 2007. The concept of this microprocessor generation was discussed with Pat Gelsinger and John Crawford shortly after the release of 386 processor in 1985. The team started the computer simulation in early 1987. They finalized the logic and microcode function during 1988. The team finalized the database in February 1989 until

2560-484: The i486's socket and offered 2 or 8 KB of cache. Clock-for-clock, the Cyrix-made chips were generally slower than their Intel/AMD equivalents, though later products with 8 KB caches were more competitive, albeit late to market. The Motorola 68040 , while not i486 compatible, was often positioned as its equivalent in features and performance. Clock-for-clock basis the Motorola 68040 could significantly outperform

2624-499: The i486-bus (basically a local bus) while the PCI bus also usually depended on the i486 clock but sometimes had a divider setting available via the BIOS. This could be set to 1/1 or 1/2, sometimes even 2/3 (for 50 MHz CPU clocks). Some motherboards limited the PCI clock to the specified maximum of 33 MHz and certain network cards depended on this frequency for correct bit-rates. The ISA clock

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2688-461: The internal CPU logic at twice the external bus speed (50 MHz), was nevertheless slower because the external bus ran at only 25 MHz. The i486DX2 at 66 MHz (with 33 MHz external bus) was faster than the 486DX-50, overall. More powerful i486 iterations such as the OverDrive and DX4 were less popular (the latter available as an OEM part only), as they came out after Intel had released

2752-740: The last i486 processors often used in late-generation i486 motherboards. They came with PCI slots and 72-pin SIMMs that were designed to run Windows 95 , and also used for 80486 motherboards upgrades. While the Cyrix Cx5x86 faded when the Cyrix 6x86 took over, the AMD Am5x86 remained important given AMD K5 delays. Computers based on the i486 remained popular through the late 1990s, serving as low-end processors for entry-level PCs. Production for traditional desktop and laptop systems ceased in 1998, when Intel introduced

2816-412: The latter is usually meant to be used for new software development . In digital images/pictures, 32-bit usually refers to RGBA color space ; that is, 24-bit truecolor images with an additional 8-bit alpha channel . Other image formats also specify 32 bits per pixel, such as RGBE . In digital images, 32-bit sometimes refers to high-dynamic-range imaging (HDR) formats that use 32 bits per channel,

2880-461: The limit may be lower). The world's first stored-program electronic computer , the Manchester Baby , used a 32-bit architecture in 1948, although it was only a proof of concept and had little practical capacity. It held only 32 32-bit words of RAM on a Williams tube , and had no addition operation, only subtraction. Memory, as well as other digital circuits and wiring, was expensive during

2944-460: The limit of directly addressable physical memory was 4  gigabytes as well (2 32-bit words = 2 8-bit words). Intel offered several suffixes and variants (see table). Variants include: The maximal internal clock frequency (on Intel's versions) ranged from 16 to 100 MHz. The 16 MHz i486SX model was used by Dell Computers . One of the few i486 models specified for a 50 MHz bus (486DX-50) initially had overheating problems and

3008-565: The original value (unlike a standard ADD, which returns flags only). This generation CPU has brought up to 156 different instructions listing. The i486's performance architecture is a vast improvement over the i386. It has an on-chip unified instruction and data cache , an on-chip floating-point unit (FPU) and an enhanced bus interface unit. Due to the tight pipelining, sequences of simple instructions (such as ALU reg,reg and ALU reg,im ) could sustain single-clock-cycle throughput (one instruction completed every clock). In other words, it

3072-551: The paging system except when it was disabled ( real mode had no virtual addresses). Just as with the i386, circumventing memory segmentation could substantially improve performance for some operating systems and applications. On a typical PC motherboard , either four matched 30-pin (8-bit) SIMMs or one 72-pin (32-bit) SIMM per bank were required to fit the i486's 32-bit data bus . The address bus used 30-bits (A31..A2) complemented by four byte-select pins (instead of A0,A1) to allow for any 8/16/32-bit selection. This meant that

3136-461: The patent infringement case and dropped its antitrust claim. In 1995, both Cyrix and AMD began looking at a ready market for users wanting to upgrade their processors. Cyrix released a derivative 486 processor called the 5x86 , based on the Cyrix M1 core, which was clocked up to 120 MHz and was an option for 486 Socket 3 motherboards. AMD released a 133 MHz Am5x86 upgrade chip, which

3200-410: The popular fractal generating software of the time and little else. The Motorola floating point support package (FPSP) emulated these instructions in software under interrupt. As this was an exception handler, heavy use of the transcendental functions caused severe performance penalties. Heat was always a problem throughout the 68040's life. While it delivered over four times the per-clock performance of

3264-477: The processor, but AMD won in court, which allowed it to establish itself as a competitor. AMD continued to create clones, releasing the first-generation Am486 chip in April 1993 with clock frequencies of 25, 33 and 40 MHz. Second-generation Am486DX2 chips with 50, 66 and 80 MHz clock frequencies were released the following year. The Am486 series was completed with a 120 MHz DX4 chip in 1995. AMD's long-running 1987 arbitration lawsuit against Intel

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3328-539: The then novel technique of adding oversized heat sinks with fans. The 68040 offered the same features as the Intel 80486 , but on a clock-for-clock basis could significantly outperform the Intel chip in integer and floating point instructions. The 68EC040 is a version of the Motorola 68040 microprocessor, intended for embedded controllers (EC). It differs from the 68040 in that it has neither an FPU nor an MMU. This makes it less expensive and it draws less power. The 68EC040

3392-608: The three layer 800 nm process CHMOS-V technology. They were available for US$ 665 in 1,000-unit quantities. In that season, Intel introduced low-power 25 MHz Intel486 DX microprocessor. This one was available for US$ 471. Also, there were low-power 16, 20, and 25 MHz Intel486 SX microprocessors. They were available at $ 235, $ 266, and $ 366 for these frequency range respectively. All pricing were in quantities of 1,000 pieces. These low-power microprocessors have power consumption reduced by 50–75% compared to similar regular versions of these CPUs. The first major update to

3456-518: The triple-clock-rate 486DX4-100 with a 100 MHz clock speed and a L1 cache doubled to 16 KB. Earlier, Intel had decided not to share its 80386 and 80486 technologies with AMD. However, AMD believed that their technology sharing agreement extended to the 80386 as a derivative of the 80286. AMD reverse-engineered the 386 and produced the 40 MHz Am386DX-40 chip, which was cheaper and had lower power consumption than Intel's best 33 MHz version. Intel attempted to prevent AMD from selling

3520-529: The whole line, but until around 2000 the 40 MHz grade was only for the "full" 68040. A planned 50 MHz grade was canceled after it exceeded the thermal design envelope . In Apple Macintosh computers, the 68040 was introduced in the Macintosh Quadra , which was named for the chip. The fastest 68040 processor was clocked at 40 MHz and it was used only in the Quadra 840AV. The more expensive models in

3584-701: Was a fabless co-processor chip maker for 80286/386 systems. The first Cyrix 486 processors, the 486SLC and 486DLC, were released in 1992 and used the 80386 package. Both Texas Instruments -manufactured Cyrix processors were pin-compatible with 386SX/DX systems, which allowed them to become an upgrade option. However, these chips could not match the Intel 486 processors, having only 1 KB of cache memory and no built-in math coprocessor. In 1993, Cyrix released its own Cx486DX and DX2 processors, which were closer in performance to Intel's counterparts. Intel and Cyrix sued each other, with Intel filing for patent infringement , and Cyrix for antitrust claims. In 1994, Cyrix won

3648-418: Was announced, the initial performance was originally published between 15 and 20 VAX MIPS , between 37,000 and 49,000 dhrystones per second , and between 6.1 and 8.2 double-precision megawhetstones per second for both 25 and 33 MHz version. A typical 50 MHz i486 executes 41 million instructions per second Dhrystone MIPS and SPEC integer rating of 27.9. It is approximately twice as fast as

3712-469: Was essentially an improved 80486 with double the cache and a quad multiplier that also worked with the original 486DX motherboards. Am5x86 was the first processor to use AMD's performance rating and was marketed as Am5x86-P75, with claims that it was equivalent to the Pentium ;75. Kingston Technology launched a "TurboChip" 486 system upgrade that used a 133 MHz Am5x86. Intel responded by making

3776-410: Was known as a very high performance unit and Motorola did not wish to risk integrators using the "LC" version with a 68882 instead of the more profitable full "RC" unit. (For information on Motorola's multiprocessing model with the 680x0 series, see Motorola 68020 .) The FPU in the 68040 was incapable of IEEE transcendental functions , which had been supported by both the 68881 and 68882 and were used by

3840-410: Was moved to the 0.8- micrometer fabrication process. However, problems continued when the 486DX-50 was installed in local-bus systems due to the high bus speed, making it unpopular with mainstream consumers. Local-bus video was considered a requirement at the time, though it remained popular with users of EISA systems. The 486DX-50 was soon eclipsed by the clock-doubled i486DX2 , which although running

3904-606: Was running about 1.8 clocks per instruction. These improvements yielded a rough doubling in integer ALU performance over the i386 at the same clock rate . A 16 MHz i486 therefore had performance similar to a 33 MHz i386. With the combination both CPU and NPU house in the die would have bus utilization rate of 50% for the 25 MHz Intel486 version. In other words, with the combination of both CPU and MCP (math coprocessor) provides 40% more performance than with both Intel386 DX and Intel387 DX math coprocessor combined. The older design had to reach 50 MHz to be comparable with

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3968-411: Was settled in 1995, and AMD gained access to Intel's 80486 microcode. This led to the creation of two versions of AMD's 486 processor – one reverse-engineered from Intel's microcode, while the other used AMD's microcode in a clean-room design process. However, the settlement also concluded that the 80486 would be AMD's last Intel clone. Another 486 clone manufacturer was Cyrix , which

4032-677: Was typically generated by a divider of the CPU/VLB/PCI clock. One of the earliest complete systems to use the i486 chip was the Apricot VX FT, produced by British hardware manufacturer Apricot Computers . Even overseas in the United States it was popularized as "The World's First 486". Later i486 boards supported Plug-And-Play , a specification designed by Microsoft that began as a part of Windows 95 to make component installation easier for consumers. The AMD Am5x86 and Cyrix Cx5x86 were

4096-474: Was used in Cisco switch Supervisor Engine I that is the heart of models 2900, 2948G, 2980G, 4000, 4500, 5000, 5500, 6000, 6500 and 7600. The 68LC040 is a low cost version of the Motorola 68040 microprocessor with no FPU. This makes it less expensive and it draws less power. Although the CPU now fits into a feature chart more like the Motorola 68030, it continues to include the 68040's caches and pipeline and

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