The IBM Basic assembly language and successors is a series of assembly languages and assemblers made for the IBM System/360 mainframe system and its successors through the IBM Z .
119-528: The first of these, the Basic Assembly Language ( BAL ), is an extremely restricted assembly language , introduced in 1964 and used on 360 systems with only 8 KB of main memory, and only a card reader , a card punch , and a printer for input/output , as part of IBM Basic Programming Support (BPS/360). The Basic Assembler for BAL was also available as part of Basic Operating System/360 (BOS/360). Subsequently, an assembly language appeared for
238-498: A 7090 or 7094 system and was used while System/360 was in development. This assembler supports six-bit BCD character set as well as eight-bit EBCDIC . IBM supplied two assemblers for the Model 20: the Model 20 Basic Assembler, and the Model 20 DPS/TPS Assembler. Both supported only instructions available on the Model 20, including unique instructions CIO , TIO , XIOB , SPSW , BAS , BASR , and HPR . The Basic Assembler
357-727: A Prototype Control Section containing relocatable address constants and modifiable data used by the program. "Assembler G" is a set of modifications made to Assembler F in the 1970s by the University of Waterloo (Assembler F was/is open source). Enhancements are mostly in better handling of input/output and improved buffering which speed up assemblies considerably. "Assembler G" was never an IBM product. There have been several IBM-compatible assemblers for special environments. Originally all System/360 operating systems were written in assembler language, and all system interfaces were defined by macro definitions. Access from high-level languages (HLLs)
476-492: A code obfuscation technique as a measure against disassembly and tampering. The principle is also used in shared code sequences of fat binaries which must run on multiple instruction-set-incompatible processor platforms. This property is also used to find unintended instructions called gadgets in existing code repositories and is used in return-oriented programming as alternative to code injection for exploits such as return-to-libc attacks . In some computers,
595-474: A register . The binary code for this instruction is 10110 followed by a 3-bit identifier for which register to use. The identifier for the AL register is 000, so the following machine code loads the AL register with the data 01100001. This binary computer code can be made more human-readable by expressing it in hexadecimal as follows. Here, B0 means "Move a copy of the following value into AL ", and 61
714-477: A call storing the return address and condition code in a register, SVC , DIAG , and ZAP . System/360 machine instructions are one, two, or three halfwords in length (two to 6 bytes). Originally there were four instruction formats, designated by the first two bits of the operation code field; z/Architecture added additional formats. The Basic Programming Support assembler did not support macros . Later assembler versions beginning with Assembler D allow
833-468: A common assembler for OS/VS, DOS/VS and VM systems. Other changes include relaxing restrictions on expressions and macro processing. Assembler XF requires a minimum partition/region size of 64 KB (virtual). Recommended size is 128 KB. High Level Assembler or HLASM was released in June 1992 replacing IBM's Assembler H Version 2. It was the default translator for System/370 and System/390, and supported
952-459: A constant to be placed in the object code. One of the more important assembler instructions is USING , which supports the base-displacement addressing of the S/360 architecture. It guides the assembler in determining what base register and offset it should use for a relative address. In BAL, it was limited to the form Machine instruction addresses on S/360 specify a displacement (0–4095 bytes) from
1071-403: A high compare). It can assemble only a single control section and does not allow dummy sections (structure definitions). Parenthesized expressions are not allowed and expressions are limited to three terms with the only operators being '+', '-', and '*'. The Basic Operating System has two assembler versions. Both require 16 KB memory, one is tape resident and the other disk. Assembler D
1190-512: A higher-level language, for performance reasons or to interact directly with hardware in ways unsupported by the higher-level language. For instance, just under 2% of version 4.9 of the Linux kernel source code is written in assembly; more than 97% is written in C . Assembly language uses a mnemonic to represent, e.g., each low-level machine instruction or opcode , each directive , typically also each architectural register , flag , etc. Some of
1309-478: A list of data, arguments or parameters. Some instructions may be "implied", which means the data upon which the instruction operates is implicitly defined by the instruction itself—such an instruction does not take an operand. The resulting statement is translated by an assembler into machine language instructions that can be loaded into memory and executed. For example, the instruction below tells an x86 / IA-32 processor to move an immediate 8-bit value into
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#17328686311011428-486: A machine with a single accumulator , the accumulator is implicitly both the left operand and result of most arithmetic instructions. Some other architectures, such as the x86 architecture, have accumulator versions of common instructions, with the accumulator regarded as one of the general registers by longer instructions. A stack machine has most or all of its operands on an implicit stack. Special purpose instructions also often lack explicit operands; for example, CPUID in
1547-705: A macro definition, e.g., MEXIT in HLASM , while others may be permitted within open code (outside macro definitions), e.g., AIF and COPY in HLASM. In assembly language, the term "macro" represents a more comprehensive concept than it does in some other contexts, such as the pre-processor in the C programming language , where its #define directive typically is used to create short single line macros. Assembler macro instructions, like macros in PL/I and some other languages, can be lengthy "programs" by themselves, executed by interpretation by
1666-481: A mask of 0. Extended mnemonics are often used to support specialized uses of instructions, often for purposes not obvious from the instruction name. For example, many CPU's do not have an explicit NOP instruction, but do have instructions that can be used for the purpose. In 8086 CPUs the instruction xchg ax , ax is used for nop , with nop being a pseudo-opcode to encode the instruction xchg ax , ax . Some disassemblers recognize this and will decode
1785-445: A minimum of 32 KB of main storage, with the assembler itself requiring 15 KB. Assembler F can run under either DOS/360 or OS/360 on a system with a 64 KB memory, with the assembler requiring 44 KB. These assemblers are a standard part of OS/360; the version that was generated was specified at system generation (SYSGEN). Assembler H runs on OS/360 and successors ; it was faster and more powerful than Assembler F, but
1904-438: A mnemonic is a symbolic name for a single executable machine language instruction (an opcode ), and there is at least one opcode mnemonic defined for each machine language instruction. Each instruction typically consists of an operation or opcode plus zero or more operands . Most instructions refer to a single value or a pair of values. Operands can be immediate (value coded in the instruction itself), registers specified in
2023-410: A move between a byte-sized register and either another register or memory, and the second byte, E0h, is encoded (with three bit-fields) to specify that both operands are registers, the source is AH , and the destination is AL . In a case like this where the same mnemonic can represent more than one binary instruction, the assembler determines which instruction to generate by examining the operands. In
2142-436: A number of features not found in other System/360 assemblers—notably instructions to update a card image source dataset, named common, and implicit definition of SETA assembler variables. It has no support for storage-to-storage (SS) instructions or the convert to binary ( CVB ), convert to decimal ( CVD ), read direct ( RDD ) and write direct ( WRD ) instructions. It does include four instructions unique to
2261-433: A one-to-one mapping to machine code. The assembly language decoding method is called disassembly . Machine code may be decoded back to its corresponding high-level language under two conditions: The first condition is to accept an obfuscated reading of the source code. An obfuscated version of source code is displayed if the machine code is sent to a decompiler of the source language. The second condition requires
2380-400: A paging based system, if the current page actually holds machine code by an execute bit — pages have multiple such permission bits (readable, writable, etc.) for various housekeeping functionality. E.g. on Unix-like systems memory pages can be toggled to be executable with the mprotect() system call, and on Windows, VirtualProtect() can be used to achieve a similar result. If an attempt
2499-522: A programmer, so that one program can be assembled in different ways, perhaps for different applications. Or, a pseudo-op can be used to manipulate presentation of a program to make it easier to read and maintain. Another common use of pseudo-ops is to reserve storage areas for run-time data and optionally initialize their contents to known values. Symbolic assemblers let programmers associate arbitrary names ( labels or symbols ) with memory locations and various constants. Usually, every constant and variable
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#17328686311012618-400: A pseudoinstruction that expands to the machine's "set if less than" and "branch if zero (on the result of the set instruction)". Most full-featured assemblers also provide a rich macro language (discussed below) which is used by vendors and programmers to generate more complex code and data sequences. Since the information about pseudoinstructions and macros defined in the assembler environment
2737-400: A second pass would require storing the symbol table in memory (to handle forward references ), rewinding and rereading the program source on tape , or rereading a deck of cards or punched paper tape . Later computers with much larger memories (especially disc storage), had the space to perform all necessary processing without such re-reading. The advantage of the multi-pass assembler is that
2856-490: A short trial, decided not to release the PL/S compiler to users. As a result of these factors, assembler language saw significant use on IBM systems for many years. Assembly language In computer programming , assembly language (alternatively assembler language or symbolic machine code ), often referred to simply as assembly and commonly abbreviated as ASM or asm , is any low-level programming language with
2975-444: A tag and a Y field. In addition to transfer (branch) instructions, these machines have skip instruction that conditionally skip one or two words, e.g., Compare Accumulator with Storage (CAS) does a three way compare and conditionally skips to NSI, NSI+1 or NSI+2, depending on the result. The MIPS architecture provides a specific example for a machine code whose instructions are always 32 bits long. The general type of instruction
3094-408: A very strong correspondence between the instructions in the language and the architecture's machine code instructions . Assembly language usually has one statement per machine instruction (1:1), but constants, comments , assembler directives , symbolic labels of, e.g., memory locations , registers , and macros are generally also supported. The first assembly code in which a language
3213-444: Is computer code consisting of machine language instructions , which are used to control a computer's central processing unit (CPU). For conventional binary computers , machine code is the binary representation of a computer program which is actually read and interpreted by the computer. A program in machine code consists of a sequence of machine instructions (possibly interspersed with data). Each machine code instruction causes
3332-403: Is a one-to-one correspondence between many simple assembly statements and machine language instructions. However, in some cases, an assembler may provide pseudoinstructions (essentially macros) which expand into several machine language instructions to provide commonly needed functionality. For example, for a machine that lacks a "branch if greater or equal" instruction, an assembler may provide
3451-447: Is a hexadecimal representation of the value 01100001, which is 97 in decimal . Assembly language for the 8086 family provides the mnemonic MOV (an abbreviation of move ) for instructions such as this, so the machine code above can be written as follows in assembly language, complete with an explanatory comment if required, after the semicolon. This is much easier to read and to remember. In some assembly languages (including this one)
3570-453: Is a key feature of assemblers, saving tedious calculations and manual address updates after program modifications. Most assemblers also include macro facilities for performing textual substitution – e.g., to generate common short sequences of instructions as inline , instead of called subroutines . Some assemblers may also be able to perform some simple types of instruction set -specific optimizations . One concrete example of this may be
3689-439: Is a slightly more restricted version of System/360 Basic Assembler; notably, symbols are restricted to four characters in length. This version is capable of running on a system with 4 KB memory, and macro support is limited to IOCS macros. The card versions are two-pass assemblers that only support card input/output. The tape-resident versions are one-pass, using magnetic tape for intermediate storage. Programs assembled with
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3808-404: Is always completely unable to recover source comments. Each computer architecture has its own machine language. Computers differ in the number and type of operations they support, in the different sizes and numbers of registers, and in the representations of data in storage. While most general-purpose computers are able to carry out essentially the same functionality, the ways they do so differ;
3927-400: Is defined as a set of assembly language "macro" instructions, that typically invoke Supervisor Call ( SVC ) [e.g., on z/OS] or Diagnose ( DIAG ) [on, e.g., z/VM] instructions to invoke operating system routines. It is possible to use operating system services from programs written in high-level languages by use of assembler subroutines. The format of assembler language statements reflects
4046-508: Is essential in assembly language programs, as the meaning and purpose of a sequence of binary machine instructions can be difficult to determine. The "raw" (uncommented) assembly language generated by compilers or disassemblers is quite difficult to read when changes must be made. Many assemblers support predefined macros , and others support programmer-defined (and repeatedly re-definable) macros involving sequences of text lines in which variables and constants are embedded. The macro definition
4165-477: Is generally different from bytecode (also known as p-code), which is either executed by an interpreter or itself compiled into machine code for faster (direct) execution. An exception is when a processor is designed to use a particular bytecode directly as its machine code, such as is the case with Java processors . Machine code and assembly code are sometimes called native code when referring to platform-dependent parts of language features or libraries. From
4284-401: Is given a name so instructions can reference those locations by name, thus promoting self-documenting code . In executable code, the name of each subroutine is associated with its entry point, so any calls to a subroutine can use its name. Inside subroutines, GOTO destinations are given labels. Some assemblers support local symbols which are often lexically distinct from normal symbols (e.g.,
4403-449: Is given by the op (operation) field, the highest 6 bits. J-type (jump) and I-type (immediate) instructions are fully specified by op . R-type (register) instructions include an additional field funct to determine the exact operation. The fields used in these types are: rs , rt , and rd indicate register operands; shamt gives a shift amount; and the address or immediate fields contain an operand directly. For example, adding
4522-566: Is known as the IBM High-Level Assembler ( HLASM ). As it is an assembly language , BAL uses the native instruction set of the IBM mainframe architecture on which it runs, System/360 . The successors to BAL use the native instruction sets of the IBM mainframe architectures on which they run, including System/360 , System/370 , System/370-XA , ESA/370 , ESA/390 , and z/Architecture . The simplicity of machine instructions means that
4641-428: Is made to execute machine code on a non-executable page, an architecture specific fault will typically occur. Treating data as machine code , or finding new ways to use existing machine code, by various techniques, is the basis of some security vulnerabilities. Similarly, in a segment based system, segment descriptors can indicate whether a segment can contain executable code and in what rings that code can run. From
4760-679: Is more than one assembler for the same architecture, and sometimes an assembler is specific to an operating system or to particular operating systems. Most assembly languages do not provide specific syntax for operating system calls, and most assembly languages can be used universally with any operating system, as the language provides access to all the real capabilities of the processor , upon which all system call mechanisms ultimately rest. In contrast to assembly languages, most high-level programming languages are generally portable across multiple architectures but require interpreting or compiling , much more complicated tasks than assembling. In
4879-442: Is most commonly a mixture of assembler statements, e.g., directives, symbolic machine instructions, and templates for assembler statements. This sequence of text lines may include opcodes or directives. Once a macro has been defined its name may be used in place of a mnemonic. When the assembler processes such a statement, it replaces the statement with the text lines associated with that macro, then processes them as if they existed in
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4998-407: Is not available. The majority of programs today are written in a high-level language . A high-level program may be translated into machine code by a compiler . Every processor or processor family has its own instruction set . Instructions are patterns of bits , digits, or characters that correspond to machine commands. Thus, the instruction set is specific to a class of processors using (mostly)
5117-407: Is not present in the object program, a disassembler cannot reconstruct the macro and pseudoinstruction invocations but can only disassemble the actual machine instructions that the assembler generated from those abstract assembly-language entities. Likewise, since comments in the assembly language source file are ignored by the assembler and have no effect on the object code it generates, a disassembler
5236-425: Is rarely a problem. Systems may also differ in other details, such as memory arrangement, operating systems, or peripheral devices . Because a program normally relies on such factors, different systems will typically not run the same machine code, even when the same type of processor is used. A processor's instruction set may have fixed-length or variable-length instructions. How the patterns are organized varies with
5355-400: Is still used when the need for speed or very fine control is paramount. However, all of the IBM successors to BAL have included a sophisticated macro facility that allows writing much more compact source code. Another reason to use assembler is that not all operating system functions can be accessed in high level languages. The application program interfaces of IBM's mainframe operating systems
5474-465: Is typically set to a hard coded value when the CPU is first powered on, and will hence execute whatever machine code happens to be at this address. Similarly, the program counter can be set to execute whatever machine code is at some arbitrary address, even if this is not valid machine code. This will typically trigger an architecture specific protection fault. The CPU is oftentimes told, by page permissions in
5593-520: Is universally enforced by their syntax. For example, in the Intel x86 assembly language, a hexadecimal constant must start with a numeral digit, so that the hexadecimal number 'A' (equal to decimal ten) would be written as 0Ah or 0AH , not AH , specifically so that it cannot appear to be the name of register AH . (The same rule also prevents ambiguity with the names of registers BH , CH , and DH , as well as with any user-defined symbol that ends with
5712-478: Is used to represent machine code instructions is found in Kathleen and Andrew Donald Booth 's 1947 work, Coding for A.R.C. . Assembly code is converted into executable machine code by a utility program referred to as an assembler . The term "assembler" is generally attributed to Wilkes , Wheeler and Gill in their 1951 book The Preparation of Programs for an Electronic Digital Computer , who, however, used
5831-472: The xchg ax , ax instruction as nop . Similarly, IBM assemblers for System/360 and System/370 use the extended mnemonics NOP and NOPR for BC and BCR with zero masks. For the SPARC architecture, these are known as synthetic instructions . Some assemblers also support simple built-in macro-instructions that generate two or more machine instructions. For instance, with some Z80 assemblers
5950-468: The CPU pipeline as efficiently as possible. Assemblers have been available since the 1950s, as the first step above machine language and before high-level programming languages such as Fortran , Algol , COBOL and Lisp . There have also been several classes of translators and semi-automatic code generators with properties similar to both assembly and high-level languages, with Speedcode as perhaps one of
6069-566: The IA-32 instruction set; and the PowerPC 615 microprocessor, which can natively process both PowerPC and x86 instruction sets. Machine code is a strictly numerical language, and it is the lowest-level interface to the CPU intended for a programmer. Assembly language provides a direct map between the numerical machine code and a human-readable mnemonic. In assembly, numerical opcodes and operands are replaced with mnemonics and labels. For example,
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#17328686311016188-615: The IBM System/360 Model 20 , the IBM assemblers were largely upward-compatible. The differences were mainly in the complexity of expressions allowed and in macro processing. OS/360 assemblers were originally designated according to their memory requirements. The assembler for BPS is the true "basic assembler." It was intended to be loaded from cards and would run on an 8 KB System/360 (except Model 20). It has no support for macro instructions or extended mnemonics (such as BH in place of BC 2 to branch if condition code 2 indicates
6307-534: The Kruskal count , sometimes possible through opcode-level programming to deliberately arrange the resulting code so that two code paths share a common fragment of opcode sequences. These are called overlapping instructions , overlapping opcodes , overlapping code , overlapped code , instruction scission , or jump into the middle of an instruction . In the 1970s and 1980s, overlapping instructions were sometimes used to preserve memory space. One example were in
6426-456: The SLAC (Stanford Linear Accelerator) modifications. Among features added were an indication of CSECT / DSECT for location counter, dependent and labelled USING statements, a list of USING statements currently active, an indication of whether a variable is read or written in the cross-reference, and allowing mixed-case symbol names. The RSECT directive (Read-only Control Section) allows
6545-591: The Zilog Z80 processor, the machine code 00000101 , which causes the CPU to decrement the B general-purpose register , would be represented in assembly language as DEC B . The IBM 704, 709, 704x and 709x store one instruction in each instruction word; IBM numbers the bit from the left as S, 1, ..., 35. Most instructions have one of two formats: For all but the IBM 7094 and 7094 II, there are three index registers designated A, B and C; indexing with multiple 1 bits in
6664-765: The operating system , and the OS provides standard macros for requesting those services. These are analogous to Unix system calls . For instance, in MVS (later z/OS), STORAGE (with the OBTAIN parameter) dynamically allocates a block of memory, and GET retrieves the next logical record from a file. These macros are operating-system-dependent; unlike several higher-level languages, IBM mainframe assembly languages don't provide operating-system-independent statements or libraries to allocate memory, perform I/O operations, and so forth, and different IBM mainframe operating systems are not compatible at
6783-421: The source code of a program written in assembler will usually be much longer than an equivalent program in, say, COBOL or Fortran . In the past, the speed of hand-coded assembler programs was often felt to make up for this drawback, but with the advent of optimizing compilers, C for the mainframe, and other advances, assembler has lost much of its appeal. IBM continues to upgrade the assembler, however, and it
6902-416: The x86 architecture has available the 0x90 opcode; it is represented as NOP in the assembly source code . While it is possible to write programs directly in machine code, managing individual bits and calculating numerical addresses is tedious and error-prone. Therefore, programs are rarely written directly in machine code. However, an existing machine code program may be edited if the assembly source code
7021-400: The "System/360 Assembler Language", as the "Assembler" for a given operating system or platform, or similar names. Specific assemblers were known by such names as Assembler E, Assembler F, Assembler H, and so forth. Programmers utilizing this language, and this family of assemblers, also refer to them as ALC (for Assembly Language Coding), or simply "the assembler". The latest derived language
7140-756: The 1950s and early 1960s. Some assemblers have free-form syntax, with fields separated by delimiters, e.g., punctuation, white space . Some assemblers are hybrid, with, e.g., labels, in a specific column and other fields separated by delimiters; this became more common than column-oriented syntax in the 1960s. An assembler program creates object code by translating combinations of mnemonics and syntax for operations and addressing modes into their numerical equivalents. This representation typically includes an operation code (" opcode ") as well as other control bits and data. The assembler also calculates constant expressions and resolves symbolic names for memory locations and other entities. The use of symbolic references
7259-476: The CPS Assembler can address a maximum of 16 KB. The DPS/TPS assembler is a somewhat restricted version of System/360 BPS/BOS Assembler. The IBM System/360 Model 44 Programming System Assembler processes a language that is a "selected subset" of OS/360 and DOS/360 assembler language. Most significantly the Model 44 assembler lacks support for macros and continuation statements. On the other hand it has
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#17328686311017378-547: The CPU to perform a specific task. Examples of such tasks include: In general, each architecture family (e.g., x86 , ARM ) has its own instruction set architecture (ISA), and hence its own specific machine code language. There are exceptions, such as the VAX architecture, which includes optional support of the PDP-11 instruction set; the IA-64 architecture, which includes optional support of
7497-540: The Intel 8080 family and the Intel 8086/8088. Because Intel claimed copyright on its assembly language mnemonics (on each page of their documentation published in the 1970s and early 1980s, at least), some companies that independently produced CPUs compatible with Intel instruction sets invented their own mnemonics. The Zilog Z80 CPU, an enhancement of the Intel 8080A , supports all the 8080A instructions plus many more; Zilog invented an entirely new assembly language, not only for
7616-461: The MVS, VSE, and VM operating systems. As of 2023 it is IBM 's current assembler programming language for its z/OS , z/VSE , z/VM and z/TPF operating systems on z/Architecture mainframe computers . Release 6 and later also run on Linux , and generate ELF or GOFF object files (this environment is sometimes referred to as Linux on IBM Z ). While working at IBM, John Robert Ehrman created and
7735-554: The Model 44: Change Priority Mask ( CHPM ), Load PSW Special ( LPSX ), Read Direct Word ( RDDW ), and Write Direct Word ( WRDW ). It also includes directives to update the source program, a function performed by utility programs in other systems ( SKPTO , REWND , NUM , OMIT and ENDUP ). The assembler for the System/360 Model 67 Time Sharing System has a number of differences in directives to support unique TSS features. The PSECT directive generates
7854-554: The System/360 that had more powerful features and usability, such as support for macros . This language, and the line of assemblers that implemented it, continued to evolve for the System/370 and the architectures that followed, inheriting and extending its syntax. Some in the computer industry referred to these under the generic term "Basic Assembly Language" or "BAL". Many did not, however, and IBM itself usually referred to them as simply
7973-521: The V20 and V30 actually wrote in NEC's assembly language rather than Intel's; since any two assembly languages for the same instruction set architecture are isomorphic (somewhat like English and Pig Latin ), there is no requirement to use a manufacturer's own published assembly language with that manufacturer's products. There is a large degree of diversity in the way the authors of assemblers categorize statements and in
8092-460: The Z80, NEC invented new mnemonics for all of the 8086 and 8088 instructions, to avoid accusations of infringement of Intel's copyright. (It is questionable whether such copyrights can be valid, and later CPU companies such as AMD and Cyrix republished Intel's x86/IA-32 instruction mnemonics exactly with neither permission nor legal penalty.) It is doubtful whether in practice many people who programmed
8211-402: The absence of errata makes the linking process (or the program load if the assembler directly produces executable code) faster. Example: in the following code snippet, a one-pass assembler would be able to determine the address of the backward reference BKWD when assembling statement S2 , but would not be able to determine the address of the forward reference FWD when assembling
8330-424: The architecture, these elements may also be combined for specific instructions or addressing modes using offsets or other data as well as fixed addresses. Many assemblers offer additional mechanisms to facilitate program development, to control the assembly process, and to aid debugging . Some are column oriented, with specific fields in specific columns; this was very common for machines using punched cards in
8449-509: The assembler during assembly. Since macros can have 'short' names but expand to several or indeed many lines of code, they can be used to make assembly language programs appear to be far shorter, requiring fewer lines of source code, as with higher level languages. They can also be used to add higher levels of structure to assembly programs, optionally introduce embedded debugging code via parameters and other similar features. Machine instruction In computer programming , machine code
8568-443: The assembler operates and "may affect the object code, the symbol table, the listing file, and the values of internal assembler parameters". Sometimes the term pseudo-opcode is reserved for directives that generate object code, such as those that generate data. The names of pseudo-ops often start with a dot to distinguish them from machine instructions. Pseudo-ops can make the assembly of the program dependent on parameters input by
8687-634: The assembler to check reentrancy on a per-section basis. RSECT was previously "undocumented and inconsistently implemented in Assembler H." The High Level Assembler Toolkit is a separately priced accompaniment to the High Level Assembler. The toolkit contains: The IBM 7090/7094 Support Package, known as SUPPAK, "consists of three programs designed to permit programs written for a System 360 to be assembled, tested, and executed on an IBM 709, 7090, 7094, or 7094 II." This cross-assembler runs on
8806-571: The base register in each instruction. Programmers are still responsible for actually loading the address of "base" into the register before writing code that depends on this value. The related DROP assembler instruction nullifies a previous USING . There is a one-to-one relationship with machine instructions . The full mnemonic instruction set is described in the Principles of Operation manual for each instruction set. Examples: Generally accepted standards, although by no means mandatory, include
8925-575: The better-known examples. There may be several assemblers with different syntax for a particular CPU or instruction set architecture . For instance, an instruction to add memory data to a register in a x86 -family processor might be add eax,[ebx] , in original Intel syntax , whereas this would be written addl (%ebx),%eax in the AT&;T syntax used by the GNU Assembler . Despite different appearances, different syntactic forms generally generate
9044-674: The branch statement S1 ; indeed, FWD may be undefined. A two-pass assembler would determine both addresses in pass 1, so they would be known when generating code in pass 2. More sophisticated high-level assemblers provide language abstractions such as: See Language design below for more details. A program written in assembly language consists of a series of mnemonic processor instructions and meta-statements (known variously as declarative operations, directives, pseudo-instructions, pseudo-operations and pseudo-ops), comments and data. Assembly language instructions usually consist of an opcode mnemonic followed by an operand , which might be
9163-404: The corresponding assembly languages reflect these differences. Multiple sets of mnemonics or assembly-language syntax may exist for a single instruction set, typically instantiated in different assembler programs. In these cases, the most popular one is usually that supplied by the CPU manufacturer and used in its documentation. Two examples of CPUs that have two different sets of mnemonics are
9282-425: The first decades of computing, it was commonplace for both systems programming and application programming to take place entirely in assembly language. While still irreplaceable for some purposes, the majority of programming is now conducted in higher-level interpreted and compiled languages. In " No Silver Bullet ", Fred Brooks summarised the effects of the switch away from assembly language programming: "Surely
9401-477: The first example, the operand 61h is a valid hexadecimal numeric constant and is not a valid register name, so only the B0 instruction can be applicable. In the second example, the operand AH is a valid register name and not a valid numeric constant (hexadecimal, decimal, octal, or binary), so only the 88 instruction can be applicable. Assembly languages are always designed so that this sort of lack of ambiguity
9520-464: The following examples show. In each case, the MOV mnemonic is translated directly into one of the opcodes 88-8C, 8E, A0-A3, B0-BF, C6 or C7 by an assembler, and the programmer normally does not have to know or remember which. Transforming assembly language into machine code is the job of an assembler, and the reverse can at least partially be achieved by a disassembler . Unlike high-level languages , there
9639-480: The identification of general purpose registers with mnemonics. Unlike assemblers for some other systems, such as X86 assembly language , register mnemonics are not reserved symbols but are defined through EQU statements elsewhere in the program. This improves readability of assembler language programs and provides a cross-reference of register usage. Thus typically you may see the following in an assembler program: Some notable instruction mnemonics are BALR for
9758-464: The implementation of error tables in Microsoft 's Altair BASIC , where interleaved instructions mutually shared their instruction bytes. The technique is rarely used today, but might still be necessary to resort to in areas where extreme optimization for size is necessary on byte-level such as in the implementation of boot loaders which have to fit into boot sectors . It is also sometimes used as
9877-455: The instruction ld hl,bc is recognized to generate ld l,c followed by ld h,b . These are sometimes known as pseudo-opcodes . Mnemonics are arbitrary symbols; in 1985 the IEEE published Standard 694 for a uniform set of mnemonics to be used by all assemblers. The standard has since been withdrawn. There are instructions used to define data elements to hold data and variables. They define
9996-467: The instruction or implied, or the addresses of data located elsewhere in storage. This is determined by the underlying processor architecture: the assembler merely reflects how this architecture works. Extended mnemonics are often used to specify a combination of an opcode with a specific operand, e.g., the System/360 assemblers use B as an extended mnemonic for BC with a mask of 15 and NOP ("NO OPeration" – do nothing for one step) for BC with
10115-422: The layout of an 80-column punched card, though successive versions have relaxed most of the restrictions. Basic Assembly language also permits an alternate statement format with the statement starting in column 25, allowing the assembled instruction to be punched into the same card beginning in column 1. This option was not continued in later versions of the assembler. Three main types of instructions are found in
10234-403: The letter H and otherwise contains only characters that are hexadecimal digits, such as the word "BEACH".) Returning to the original example, while the x86 opcode 10110000 ( B0 ) copies an 8-bit value into the AL register, 10110001 ( B1 ) moves it into CL and 10110010 ( B2 ) does so into DL . Assembly language examples for these follow. The syntax of MOV can also be more complex as
10353-519: The machine code of the architecture is implemented by an even more fundamental underlying layer called microcode , providing a common machine language interface across a line or family of different models of computer with widely different underlying dataflows . This is done to facilitate porting of machine language programs between different models. An example of this use is the IBM System/360 family of computers and their successors. Machine code
10472-489: The macro language was not fully compatible. Assembler H Version 2 was announced in 1981 and includes support for Extended Architecture (XA), including the AMODE and RMODE directives. It was withdrawn from marketing in 1994 and support ended in 1995. It was replaced by High Level Assembler. Assembler XF is a mostly compatible upgrade of Assembler F that includes the new System/370 architecture instructions. This version provides
10591-427: The mnemonics may be built-in and some user-defined. Many operations require one or more operands in order to form a complete instruction. Most assemblers permit named constants, registers, and labels for program and memory locations, and can calculate expressions for operands. Thus, programmers are freed from tedious repetitive calculations and assembler programs are much more readable than machine code. Depending on
10710-423: The most powerful stroke for software productivity, reliability, and simplicity has been the progressive use of high-level languages for programming. Most observers credit that development with at least a factor of five in productivity, and with concomitant gains in reliability, simplicity, and comprehensibility." Today, it is typical to use small amounts of assembly language code within larger systems implemented in
10829-458: The new instructions but also for all of the 8080A instructions. For example, where Intel uses the mnemonics MOV , MVI , LDA , STA , LXI , LDAX , STAX , LHLD , and SHLD for various data transfer instructions, the Z80 assembly language uses the mnemonic LD for all of them. A similar case is the NEC V20 and V30 CPUs, enhanced copies of the Intel 8086 and 8088, respectively. Like Zilog with
10948-400: The nomenclature that they use. In particular, some describe anything other than a machine mnemonic or extended mnemonic as a pseudo-operation (pseudo-op). A typical assembly language consists of 3 types of instruction statements that are used to define program operations: Instructions (statements) in assembly language are generally very simple, unlike those in high-level languages . Generally,
11067-405: The operation, and if necessary, pad it with one or more " no-operation " instructions in a later pass or the errata. In an assembler with peephole optimization , addresses may be recalculated between passes to allow replacing pessimistic code with code tailored to the exact distance from the target. The original reason for the use of one-pass assemblers was memory size and speed of assembly – often
11186-406: The operator's console: WTO is an assembler macro that generates an operating system call. Because of saving registers and later restoring and returning, this small program is usable as a batch program invoked directly by the operating system Job control language (JCL) like this: or, alternatively, it can be CALLed as a subroutine from such a program: With the exception of the assemblers for
11305-412: The other four index registers. The effective address is normally Y-C(T), where C(T) is either 0 for a tag of 0, the logical or of the selected index regisrs in multiple tag mode or the selected index register if not in multiple tag mode. However, the effective address for index register control instructions is just Y. A flag with both bits 1 selects indirect addressing; the indirect address word has both
11424-529: The particular architecture and type of instruction. Most instructions have one or more opcode fields that specify the basic instruction type (such as arithmetic, logical, jump , etc.), the operation (such as add or compare), and other fields that may give the type of the operand (s), the addressing mode (s), the addressing offset(s) or index, or the operand value itself (such constant operands contained in an instruction are called immediate ). Not all machines or individual instructions have explicit operands. On
11543-657: The point of view of a process , the code space is the part of its address space where the code in execution is stored. In multitasking systems this comprises the program's code segment and usually shared libraries . In multi-threading environment, different threads of one process share code space along with data space, which reduces the overhead of context switching considerably as compared to process switching. Various tools and methods exist to decode machine code back to its corresponding source code . Machine code can easily be decoded back to its corresponding assembly language source code because assembly language forms
11662-501: The point of view of the CPU, machine code is stored in RAM, but is typically also kept in a set of caches for performance reasons. There may be different caches for instructions and data, depending on the architecture. The CPU knows what machine code to execute, based on its internal program counter. The program counter points to a memory address and is changed based on special instructions which may cause programmatic branches. The program counter
11781-591: The programmer to group instructions together into macros and add them to a library, which can then be invoked in other programs, usually with parameters, like the preprocessor facilities in C and related languages. Macros can include conditional assembler instructions, such as AIF (an ‘if’ construct), used to generate different code according to the chosen parameters. That makes the macro facility of this assembler very powerful. While multiline macros in C are an exception, macro definitions in assembler can easily be hundreds of lines. Most programs will require services from
11900-412: The registers 1 and 2 and placing the result in register 6 is encoded: Load a value into register 8, taken from the memory cell 68 cells after the location listed in register 3: Jumping to the address 1024: On processor architectures with variable-length instruction sets (such as Intel 's x86 processor family) it is, within the limits of the control-flow resynchronizing phenomenon known as
12019-416: The result of a constant expression freed up by replacing it by that constant) and other code enhancements. A much more human-friendly rendition of machine language, named assembly language , uses mnemonic codes to refer to machine code instructions, rather than using the instructions' numeric values directly, and uses symbolic names to refer to storage locations and sometimes registers . For example, on
12138-439: The same architecture . Successor or derivative processor designs often include instructions of a predecessor and may add new additional instructions. Occasionally, a successor design will discontinue or alter the meaning of some instruction code (typically because it is needed for new purposes), affecting code compatibility to some extent; even compatible processors may show slightly different behavior for some instructions, but this
12257-499: The same mnemonic is used for different instructions, that means that the mnemonic corresponds to several different binary instruction codes, excluding data (e.g. the 61h in this example), depending on the operands that follow the mnemonic. For example, for the x86/IA-32 CPUs, the Intel assembly language syntax MOV AL, AH represents an instruction that moves the contents of register AH into register AL . The hexadecimal form of this instruction is: The first byte, 88h, identifies
12376-489: The same mnemonic, such as MOV, may be used for a family of related instructions for loading, copying and moving data, whether these are immediate values, values in registers, or memory locations pointed to by values in registers or by immediate (a.k.a. direct) addresses. Other assemblers may use separate opcode mnemonics such as L for "move memory to register", ST for "move register to memory", LR for "move register to register", MVI for "move immediate operand to memory", etc. If
12495-415: The same numeric machine code . A single assembler may also have different modes in order to support variations in syntactic forms as well as their exact semantic interpretations (such as FASM -syntax, TASM -syntax, ideal mode, etc., in the special case of x86 assembly programming). There are two types of assemblers based on how many passes through the source are needed (how many times the assembler reads
12614-433: The source code file (including, in some assemblers, expansion of any macros existing in the replacement text). Macros in this sense date to IBM autocoders of the 1950s. Macro assemblers typically have directives to, e.g., define macros, define variables, set variables to the result of an arithmetic, logical or string expression, iterate, conditionally generate code. Some of those directives may be restricted to use within
12733-405: The source code of a program written in assembler. Assembler instructions, sometimes termed directives , pseudo operations or pseudoops on other systems, are requests to the assembler to perform various operations during the code generation process. For instance, CSECT means "start a section of code here"; DSECT provides data definitions for a structure, but generates no code; DC defines
12852-407: The source) to produce the object file. In both cases, the assembler must be able to determine the size of each instruction on the initial passes in order to calculate the addresses of subsequent symbols. This means that if the size of an operation referring to an operand defined later depends on the type or distance of the operand, the assembler will make a pessimistic estimate when first encountering
12971-422: The system service level. For example, writing a sequential file would be coded differently in z/OS and in z/VSE. The following fragment shows how the logic "If SEX = 'M', add 1 to MALES; else, add 1 to FEMALES" would be performed in assembler. The following is the ubiquitous "Hello, World!" program , and would, executing under an IBM operating system such as OS/VS1 or MVS , display the words 'Hello, World!' on
13090-443: The tag subtracts the logical or of the selected index registers and loading with multiple 1 bits in the tag loads all of the selected index registers. The 7094 and 7094 II have seven index registers, but when they are powered on they are in multiple tag mode , in which they use only the three of the index registers in a fashion compatible with earlier machines, and require a Leave Multiple Tag Mode ( LMTM ) instruction in order to access
13209-456: The term to mean "a program that assembles another program consisting of several sections into a single program". The conversion process is referred to as assembly , as in assembling the source code . The computational step when an assembler is processing a program is called assembly time . Because assembly depends on the machine code instructions, each assembly language is specific to a particular computer architecture . Sometimes there
13328-496: The type of data, the length and the alignment of data. These instructions can also define whether the data is available to outside programs (programs assembled separately) or only to the program in which the data section is defined. Some assemblers classify these as pseudo-ops. Assembly directives, also called pseudo-opcodes, pseudo-operations or pseudo-ops, are commands given to an assembler "directing it to perform operations other than assembling instructions". Directives affect how
13447-414: The ubiquitous x86 assemblers from various vendors. Called jump-sizing , most of them are able to perform jump-instruction replacements (long jumps replaced by short or relative jumps) in any number of passes, on request. Others may even do simple rearrangement or insertion of instructions, such as some assemblers for RISC architectures that can help optimize a sensible instruction scheduling to exploit
13566-591: The use of "10$ " as a GOTO destination). Some assemblers, such as NASM , provide flexible symbol management, letting programmers manage different namespaces , automatically calculate offsets within data structures , and assign labels that refer to literal values or the result of simple computations performed by the assembler. Labels can also be used to initialize constants and variables with relocatable addresses. Assembly languages, like most other computer languages, allow comments to be added to program source code that will be ignored during assembly. Judicious commenting
13685-433: The value in a base register ; while later versions of the architecture added relative-address formats, the older formats are still used by many instructions. USING allows the programmer to tell the assembler that the specified base registers are assumed to contain the address of "base", base+4096 (if multiple registers are specified), etc. This only provides a shortcut for the programmer, who otherwise would have to specify
13804-406: The x86 architecture writes values into four implicit destination registers. This distinction between explicit and implicit operands is important in code generators, especially in the register allocation and live range tracking parts. A good code optimizer can track implicit and explicit operands which may allow more frequent constant propagation , constant folding of registers (a register assigned
13923-451: Was restricted to what that language supplied, and other system calls had to be coded as assembler subroutines called from HLL programs. Also, IBM allowed customization of OS features by an installation thru what were known as Exits —user-supplied routines that could extend or alter normal OS functions. These exits were required to be coded in assembler language. Later, IBM recoded OS/360 in a systems programming language, PL/S , but, except for
14042-479: Was the DOS/360 assembler for machines with a memory size of 16 KB. It came in two versions: A 10 KB variant for machines with the minimum 16 KB memory, and a 14 KB variant for machines with 24 KB. An F-level assembler was also available for DOS machines with 64 KB or more. D assemblers offered nearly all the features of higher versions. Assembler E was designed to run on an OS/360 system with
14161-411: Was the lead developer for HLASM and is considered the "father of high level assembler". Despite the name, HLASM on its own does not have many of the features normally associated with a high-level assembler . The name may come from the additional macro language capabilities, such as the ability to write user-defined functions. The assembler is mostly similar to Assembler H and Assembler(XF), incorporating
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